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17:12:56",{"text":11,"minutes":126,"time":127,"words":128},2.1,126000,420,{"stem":130,"path":131,"title":132,"date":133,"collapsed":9,"readingTime":134},"posts\u002FUGCourses\u002F2.sophomore-autumn\u002FProbability-Theory","\u002F2025\u002F01\u002F21\u002FProbability-Theory","概率论与数理统计","2025-01-21 12:52:11",{"text":11,"minutes":135,"time":136,"words":137},2.205,132300,441,{"stem":139,"path":140,"title":141,"date":142,"collapsed":9,"readingTime":143},"posts\u002FUGCourses\u002F2.sophomore-autumn\u002Fengineering-training","\u002F2024\u002F09\u002F17\u002Fengineering-training","工程训练","2024-09-17 21:40:26",{"text":11,"minutes":144,"time":145,"words":146},2.385,143100,477,{"stem":148,"path":149,"title":150,"date":78,"collapsed":9,"readingTime":151},"posts\u002FUGCourses\u002F2.sophomore-autumn\u002Findex","\u002Fugcourses\u002Fsophomore-autumn","大二秋冬",{"text":80,"minutes":81,"time":81,"words":81},{"stem":153,"path":154,"title":155,"date":156,"collapsed":9,"readingTime":157},"posts\u002FUGCourses\u002F2.sophomore-autumn\u002Fsolid-state-physics","\u002F2024\u002F09\u002F11\u002Fsolid-state-physics","固体物理基础","2024-09-11 19:15:26",{"text":158,"minutes":159,"time":160,"words":161},"4 min read",3.21,192600,642,{"stem":163,"path":164,"title":165,"date":166,"collapsed":9,"readingTime":167},"posts\u002FUGCourses\u002F3.sophomore-spring\u002FAIFrontier","\u002Fugcourses\u002Fsophomore-spring\u002Faifrontier","人工智能前沿","2025-06-12 14:58:16",{"text":168,"minutes":169,"time":170,"words":171},"25 min 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19:39:00",{"text":60,"minutes":200,"time":201,"words":202},0.535,32100,107,{"stem":204,"path":205,"title":206,"date":207,"collapsed":9,"readingTime":208},"posts\u002FUGCourses\u002F4.junior-autumn\u002F1.microelectronic-devices\u002FLecture10","\u002Fugcourses\u002Fjunior-autumn\u002Fmicroelectronic-devices\u002Flecture10","Lecture 10：从 MOS 电容到 MOSFET","2026-09-10 00:10:00",{"text":209,"minutes":210,"time":211,"words":212},"18 min read",17.615,1056900,3523,{"stem":214,"path":215,"title":216,"date":217,"collapsed":9,"readingTime":218},"posts\u002FUGCourses\u002F4.junior-autumn\u002F1.microelectronic-devices\u002FLecture11","\u002Fugcourses\u002Fjunior-autumn\u002Fmicroelectronic-devices\u002Flecture11","Lecture 11：亚阈值效应与 MOSFET 尺寸缩放","2026-09-10 00:20:00",{"text":219,"minutes":220,"time":221,"words":222},"23 min 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00:50:00",{"text":21,"minutes":51,"time":52,"words":53},{"stem":340,"path":341,"title":342,"date":198,"collapsed":343,"readingTime":344},"posts\u002FUGCourses\u002F4.junior-autumn\u002F1.microelectronic-devices\u002Findex","\u002Fugcourses\u002Fjunior-autumn\u002Fmicroelectronic-devices","微电子器件",true,{"text":158,"minutes":345,"time":346,"words":347},3.055,183300,611,{"stem":349,"path":350,"title":351,"date":352,"collapsed":9,"readingTime":353},"posts\u002FUGCourses\u002F4.junior-autumn\u002F2.ICCAD\u002F1.HistoryMetaCharacters","\u002Fugcourses\u002Fjunior-autumn\u002Ficcad\u002Fhistorymetacharacters","History & Meta Characters","2026-09-10 20:25:44",{"text":269,"minutes":354,"time":355,"words":356},9.36,561600,1872,{"stem":358,"path":359,"title":360,"date":361,"collapsed":9,"readingTime":362},"posts\u002FUGCourses\u002F4.junior-autumn\u002F2.ICCAD\u002F10.PastExams\u002F1.ExamAutumn2223","\u002Fugcourses\u002Fjunior-autumn\u002Ficcad\u002Fpastexams\u002Fexamautumn2223","22-23 秋冬历年卷","2026-09-10 20:26:49",{"text":319,"minutes":363,"time":364,"words":365},20.295,1217700,4059,{"stem":367,"path":368,"title":369,"date":370,"collapsed":9,"readingTime":371},"posts\u002FUGCourses\u002F4.junior-autumn\u002F2.ICCAD\u002F10.PastExams\u002F2.Exam2021","\u002Fugcourses\u002Fjunior-autumn\u002Ficcad\u002Fpastexams\u002Fexam2021","20-21 历年卷","2026-09-10 20:26:50",{"text":289,"minutes":290,"time":291,"words":292},{"stem":373,"path":374,"title":375,"date":376,"collapsed":9,"readingTime":377},"posts\u002FUGCourses\u002F4.junior-autumn\u002F2.ICCAD\u002F10.PastExams\u002F3.ExamRecall1","\u002Fugcourses\u002Fjunior-autumn\u002Ficcad\u002Fpastexams\u002Fexamrecall1","不知名回忆卷 1","2026-09-10 20:26:51",{"text":116,"minutes":378,"time":379,"words":380},4.215,252900,843,{"stem":382,"path":383,"title":384,"date":385,"collapsed":9,"readingTime":386},"posts\u002FUGCourses\u002F4.junior-autumn\u002F2.ICCAD\u002F10.PastExams\u002F4.ExamRecall23","\u002Fugcourses\u002Fjunior-autumn\u002Ficcad\u002Fpastexams\u002Fexamrecall23","不知名回忆卷 2\u002F3","2026-09-10 20:26:52",{"text":387,"minutes":388,"time":389,"words":390},"12 min read",11.235,674100,2247,{"stem":392,"path":393,"title":394,"date":395,"collapsed":9,"readingTime":396},"posts\u002FUGCourses\u002F4.junior-autumn\u002F2.ICCAD\u002F11.Detailed\u002F1.Chapter1-Introduction","\u002Fugcourses\u002Fjunior-autumn\u002Ficcad\u002Fdetailed\u002Fchapter1-introduction","Chapter 1：Introduction","2026-09-10 20:27:26",{"text":397,"minutes":398,"time":399,"words":400},"19 min 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20:27:54",{"text":209,"minutes":454,"time":455,"words":456},17.85,1071000,3570,{"stem":458,"path":459,"title":460,"date":461,"collapsed":9,"readingTime":462},"posts\u002FUGCourses\u002F4.junior-autumn\u002F2.ICCAD\u002F11.Detailed\u002F8.Chapter8-CProgrammingInUnix","\u002Fugcourses\u002Fjunior-autumn\u002Ficcad\u002Fdetailed\u002Fchapter8-cprogramminginunix","Chapter 8：C Programming in Unix","2026-09-10 20:27:57",{"text":463,"minutes":464,"time":465,"words":466},"17 min read",16.855,1011300,3371,{"stem":468,"path":469,"title":470,"date":471,"collapsed":9,"readingTime":472},"posts\u002FUGCourses\u002F4.junior-autumn\u002F2.ICCAD\u002F2.LinuxUnix","\u002Fugcourses\u002Fjunior-autumn\u002Ficcad\u002Flinuxunix","Linux & Unix","2026-09-10 20:25:46",{"text":41,"minutes":473,"time":474,"words":475},29.33,1759800,5866,{"stem":477,"path":478,"title":479,"date":480,"collapsed":9,"readingTime":481},"posts\u002FUGCourses\u002F4.junior-autumn\u002F2.ICCAD\u002F3.Vi","\u002Fugcourses\u002Fjunior-autumn\u002Ficcad\u002Fvi","Vi","2026-09-10 20:25:47",{"text":329,"minutes":482,"time":483,"words":484},7.95,477000,1590,{"stem":486,"path":487,"title":488,"date":489,"collapsed":9,"readingTime":490},"posts\u002FUGCourses\u002F4.junior-autumn\u002F2.ICCAD\u002F4.ViCopy","\u002Fugcourses\u002Fjunior-autumn\u002Ficcad\u002Fvicopy","Vi（详细版）","2026-09-10 20:25:49",{"text":279,"minutes":491,"time":492,"words":493},13.785,827100,2757,{"stem":495,"path":496,"title":497,"date":498,"collapsed":9,"readingTime":499},"posts\u002FUGCourses\u002F4.junior-autumn\u002F2.ICCAD\u002F5.Shells","\u002Fugcourses\u002Fjunior-autumn\u002Ficcad\u002Fshells","Shells","2026-09-10 20:25:51",{"text":500,"minutes":501,"time":502,"words":503},"22 min read",21.21,1272600,4242,{"stem":505,"path":506,"title":507,"date":508,"collapsed":9,"readingTime":509},"posts\u002FUGCourses\u002F4.junior-autumn\u002F2.ICCAD\u002F6.Network","\u002Fugcourses\u002Fjunior-autumn\u002Ficcad\u002Fnetwork","Network","2026-09-10 20:25:54",{"text":319,"minutes":510,"time":511,"words":512},20.595,1235700,4119,{"stem":514,"path":515,"title":516,"date":517,"collapsed":9,"readingTime":518},"posts\u002FUGCourses\u002F4.junior-autumn\u002F2.ICCAD\u002F7.SystemAdministration","\u002Fugcourses\u002Fjunior-autumn\u002Ficcad\u002Fsystemadministration","System Administration","2026-09-10 20:26:44",{"text":329,"minutes":519,"time":520,"words":521},7.12,427200,1424,{"stem":523,"path":524,"title":525,"date":526,"collapsed":9,"readingTime":527},"posts\u002FUGCourses\u002F4.junior-autumn\u002F2.ICCAD\u002F8.XWindow","\u002Fugcourses\u002Fjunior-autumn\u002Ficcad\u002Fxwindow","XWindow","2026-09-10 20:26:45",{"text":97,"minutes":528,"time":529,"words":530},5.105,306300,1021,{"stem":532,"path":533,"title":534,"date":535,"collapsed":9,"readingTime":536},"posts\u002FUGCourses\u002F4.junior-autumn\u002F2.ICCAD\u002F9.SystemDevelopmentTools","\u002Fugcourses\u002Fjunior-autumn\u002Ficcad\u002Fsystemdevelopmenttools","System Development Tools","2026-09-10 20:26:47",{"text":387,"minutes":537,"time":538,"words":539},11.35,681000,2270,{"stem":541,"path":542,"title":543,"date":544,"collapsed":343,"readingTime":545},"posts\u002FUGCourses\u002F4.junior-autumn\u002F2.ICCAD\u002Findex","\u002Fugcourses\u002Fjunior-autumn\u002Ficcad","面向 ICCAD 的软件基础技术","2026-09-10 12:37:00",{"text":60,"minutes":546,"time":547,"words":548},0.185,11100,37,{"stem":550,"path":551,"title":552,"date":553,"collapsed":9,"readingTime":554},"posts\u002FUGCourses\u002F4.junior-autumn\u002F3.HDL\u002FFeiQilai1","\u002Fugcourses\u002Fjunior-autumn\u002Fhdl\u002Ffeiqilai1","飞起来1.0","2026-09-10 12:51:49",{"text":555,"minutes":556,"time":557,"words":558},"105 min read",104.655,6279300,20931,{"stem":560,"path":561,"title":562,"date":563,"collapsed":9,"readingTime":564},"posts\u002FUGCourses\u002F4.junior-autumn\u002F3.HDL\u002FFeiQilai2","\u002Fugcourses\u002Fjunior-autumn\u002Fhdl\u002Ffeiqilai2","飞起来2.0","2026-09-10 12:52:06",{"text":565,"minutes":566,"time":567,"words":568},"29 min read",28.755,1725300,5751,{"stem":570,"path":571,"title":572,"date":573,"collapsed":9,"readingTime":574},"posts\u002FUGCourses\u002F4.junior-autumn\u002F3.HDL\u002FFeiQilai3","\u002Fugcourses\u002Fjunior-autumn\u002Fhdl\u002Ffeiqilai3","飞起来3.0","2026-09-10 12:52:12",{"text":116,"minutes":575,"time":576,"words":577},4.49,269400,898,{"stem":579,"path":580,"title":581,"date":582,"collapsed":9,"readingTime":583},"posts\u002FUGCourses\u002F4.junior-autumn\u002F3.HDL\u002FLecture13","\u002Fugcourses\u002Fjunior-autumn\u002Fhdl\u002Flecture13","Lecture 13：浮点数标准","2026-09-10 12:51:27",{"text":11,"minutes":584,"time":585,"words":586},2.575,154500,515,{"stem":588,"path":589,"title":590,"date":591,"collapsed":9,"readingTime":592},"posts\u002FUGCourses\u002F4.junior-autumn\u002F3.HDL\u002FLecture6","\u002Fugcourses\u002Fjunior-autumn\u002Fhdl\u002Flecture6","Lecture 6：Behavioral Modeling，非阻塞赋值","2026-09-10 12:51:12",{"text":97,"minutes":593,"time":594,"words":595},5.34,320400,1068,{"stem":597,"path":598,"title":599,"date":600,"collapsed":9,"readingTime":601},"posts\u002FUGCourses\u002F4.junior-autumn\u002F3.HDL\u002FPPTCorrespondence","\u002Fugcourses\u002Fjunior-autumn\u002Fhdl\u002Fpptcorrespondence","与PPT的对应","2026-09-10 12:52:18",{"text":269,"minutes":602,"time":603,"words":604},9.275,556500,1855,{"stem":606,"path":607,"title":608,"date":544,"collapsed":343,"readingTime":609},"posts\u002FUGCourses\u002F4.junior-autumn\u002F3.HDL\u002Findex","\u002Fugcourses\u002Fjunior-autumn\u002Fhdl","硬件描述语言原理与应用",{"text":60,"minutes":61,"time":62,"words":63},{"stem":611,"path":612,"title":613,"date":614,"collapsed":9,"readingTime":615},"posts\u002FUGCourses\u002F4.junior-autumn\u002F4.analogICDesign\u002F1.BeforeMidterm","\u002Fugcourses\u002Fjunior-autumn\u002Fanalogicdesign\u002Fbeforemidterm","期中前","2026-09-10 20:28:52",{"text":616,"minutes":617,"time":618,"words":619},"11 min read",10.835,650100,2167,{"stem":621,"path":622,"title":623,"date":624,"collapsed":9,"readingTime":625},"posts\u002FUGCourses\u002F4.junior-autumn\u002F4.analogICDesign\u002F2.MidtermExam2425","\u002Fugcourses\u002Fjunior-autumn\u002Fanalogicdesign\u002Fmidtermexam2425","24-25 期中","2026-09-10 20:29:00",{"text":21,"minutes":626,"time":627,"words":628},1.22,73200,244,{"stem":630,"path":631,"title":632,"date":633,"collapsed":9,"readingTime":634},"posts\u002FUGCourses\u002F4.junior-autumn\u002F4.analogICDesign\u002F3.FinalExamReview","\u002Fugcourses\u002Fjunior-autumn\u002Fanalogicdesign\u002Ffinalexamreview","期末考试整理","2026-09-10 20:29:09",{"text":387,"minutes":635,"time":636,"words":637},11.36,681600,2272,{"stem":639,"path":640,"title":641,"date":642,"collapsed":343,"readingTime":643},"posts\u002FUGCourses\u002F4.junior-autumn\u002F4.analogICDesign\u002Findex","\u002Fugcourses\u002Fjunior-autumn\u002Fanalogicdesign","模拟集成电路设计","2026-09-10 20:00:00",{"text":80,"minutes":81,"time":81,"words":81},{"stem":645,"path":646,"title":647,"date":78,"collapsed":9,"readingTime":648},"posts\u002FUGCourses\u002F4.junior-autumn\u002Findex","\u002Fugcourses\u002Fjunior-autumn","大三秋冬",{"text":80,"minutes":81,"time":81,"words":81},{"stem":650,"path":651,"title":652,"date":653,"collapsed":9,"readingTime":654},"posts\u002FUGCourses\u002F5.junior-spring\u002F1.digitalICDesign\u002F1.Chapter3-Device","\u002Fugcourses\u002Fjunior-spring\u002Fdigitalicdesign\u002Fchapter3-device","Chapter 3：器件 Device","2026-09-10 21:14:41",{"text":249,"minutes":655,"time":656,"words":657},6.055,363300,1211,{"stem":659,"path":660,"title":661,"date":653,"collapsed":9,"readingTime":662},"posts\u002FUGCourses\u002F5.junior-spring\u002F1.digitalICDesign\u002F10.Chapter12-Arithmetic","\u002Fugcourses\u002Fjunior-spring\u002Fdigitalicdesign\u002Fchapter12-arithmetic","Chapter 12：算术运算电路 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期中试题",{"text":80,"minutes":81,"time":81,"words":81},{"stem":693,"path":694,"title":695,"date":653,"collapsed":9,"readingTime":696},"posts\u002FUGCourses\u002F5.junior-spring\u002F1.digitalICDesign\u002F13.PastExams\u002F3.FinalPolished","\u002Fugcourses\u002Fjunior-spring\u002Fdigitalicdesign\u002Fpastexams\u002Ffinalpolished","期末历年卷（AI 润色版）",{"text":21,"minutes":697,"time":698,"words":699},1.575,94500,315,{"stem":701,"path":702,"title":703,"date":653,"collapsed":9,"readingTime":704},"posts\u002FUGCourses\u002F5.junior-spring\u002F1.digitalICDesign\u002F14.ExamRecall2026","\u002Fugcourses\u002Fjunior-spring\u002Fdigitalicdesign\u002Fexamrecall2026","数字集成电路回忆 2026",{"text":60,"minutes":705,"time":706,"words":707},0.49,29400,98,{"stem":709,"path":710,"title":711,"date":653,"collapsed":9,"readingTime":712},"posts\u002FUGCourses\u002F5.junior-spring\u002F1.digitalICDesign\u002F2.Chapter4-Wire","\u002Fugcourses\u002Fjunior-spring\u002Fdigitalicdesign\u002Fchapter4-wire","Chapter 4：导线 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Gate",{"text":31,"minutes":729,"time":730,"words":731},8.635,518100,1727,{"stem":733,"path":734,"title":735,"date":653,"collapsed":9,"readingTime":736},"posts\u002FUGCourses\u002F5.junior-spring\u002F1.digitalICDesign\u002F5.Chapter7-SequentialLogic","\u002Fugcourses\u002Fjunior-spring\u002Fdigitalicdesign\u002Fchapter7-sequentiallogic","Chapter 7：时序逻辑 Sequential Logic",{"text":463,"minutes":737,"time":738,"words":739},16.645,998700,3329,{"stem":741,"path":742,"title":743,"date":653,"collapsed":9,"readingTime":744},"posts\u002FUGCourses\u002F5.junior-spring\u002F1.digitalICDesign\u002F6.Chapter8-Speed","\u002Fugcourses\u002Fjunior-spring\u002Fdigitalicdesign\u002Fchapter8-speed","Chapter 8：延迟与速度 Speed",{"text":745,"minutes":746,"time":747,"words":748},"33 min read",32.885,1973100,6577,{"stem":750,"path":751,"title":752,"date":653,"collapsed":9,"readingTime":753},"posts\u002FUGCourses\u002F5.junior-spring\u002F1.digitalICDesign\u002F7.Chapter9-Power","\u002Fugcourses\u002Fjunior-spring\u002Fdigitalicdesign\u002Fchapter9-power","Chapter 9：功耗 Power",{"text":754,"minutes":755,"time":756,"words":757},"31 min read",31.005,1860300,6201,{"stem":759,"path":760,"title":761,"date":653,"collapsed":9,"readingTime":762},"posts\u002FUGCourses\u002F5.junior-spring\u002F1.digitalICDesign\u002F8.Chapter10-Interconnect","\u002Fugcourses\u002Fjunior-spring\u002Fdigitalicdesign\u002Fchapter10-interconnect","Chapter 10：互连 Interconnect",{"text":463,"minutes":763,"time":764,"words":765},16.32,979200,3264,{"stem":767,"path":768,"title":769,"date":653,"collapsed":9,"readingTime":770},"posts\u002FUGCourses\u002F5.junior-spring\u002F1.digitalICDesign\u002F9.Chapter11-Timing","\u002Fugcourses\u002Fjunior-spring\u002Fdigitalicdesign\u002Fchapter11-timing","Chapter 11：时序 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read",43.985,2639100,8797,{"stem":824,"path":825,"title":826,"date":653,"collapsed":9,"readingTime":827},"posts\u002FUGCourses\u002F5.junior-spring\u002F2.computerOrganization\u002F14.L15","\u002Fugcourses\u002Fjunior-spring\u002Fcomputerorganization\u002Fl15","L15：期末复习问答",{"text":269,"minutes":828,"time":829,"words":830},9.105,546300,1821,{"stem":832,"path":833,"title":834,"date":653,"collapsed":9,"readingTime":835},"posts\u002FUGCourses\u002F5.junior-spring\u002F2.computerOrganization\u002F2.L2-Binary","\u002Fugcourses\u002Fjunior-spring\u002Fcomputerorganization\u002Fl2-binary","L2：二进制数制",{"text":80,"minutes":81,"time":81,"words":81},{"stem":837,"path":838,"title":839,"date":653,"collapsed":9,"readingTime":840},"posts\u002FUGCourses\u002F5.junior-spring\u002F2.computerOrganization\u002F3.L3-CMemory","\u002Fugcourses\u002Fjunior-spring\u002Fcomputerorganization\u002Fl3-cmemory","L3：C 语言与内存模型",{"text":841,"minutes":842,"time":843,"words":844},"98 min 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Design",{"text":269,"minutes":860,"time":861,"words":862},9.955,597300,1991,{"stem":864,"path":865,"title":866,"date":653,"collapsed":9,"readingTime":867},"posts\u002FUGCourses\u002F5.junior-spring\u002F2.computerOrganization\u002F7.L6a-SingleCycle","\u002Fugcourses\u002Fjunior-spring\u002Fcomputerorganization\u002Fl6a-singlecycle","L6a：单周期处理器设计",{"text":219,"minutes":868,"time":869,"words":870},22.125,1327500,4425,{"stem":872,"path":873,"title":874,"date":653,"collapsed":9,"readingTime":875},"posts\u002FUGCourses\u002F5.junior-spring\u002F2.computerOrganization\u002F8.L6b-Microcode","\u002Fugcourses\u002Fjunior-spring\u002Fcomputerorganization\u002Fl6b-microcode","L6b：微码处理器架构",{"text":387,"minutes":876,"time":877,"words":878},11.86,711600,2372,{"stem":880,"path":881,"title":882,"date":653,"collapsed":9,"readingTime":883},"posts\u002FUGCourses\u002F5.junior-spring\u002F2.computerOrganization\u002F9.L7-Pipeline","\u002Fugcourses\u002Fjunior-spring\u002Fcomputerorganization\u002Fl7-pipeline","L7：流水线处理器",{"text":177,"minutes":884,"time":885,"words":886},44.505,2670300,8901,{"stem":888,"path":889,"title":890,"date":653,"collapsed":343,"readingTime":891},"posts\u002FUGCourses\u002F5.junior-spring\u002F2.computerOrganization\u002Findex","\u002Fugcourses\u002Fjunior-spring\u002Fcomputerorganization","计算机组成与系统结构",{"text":60,"minutes":892,"time":893,"words":894},0.12,7200,24,{"stem":896,"path":897,"title":898,"date":78,"collapsed":9,"readingTime":899},"posts\u002FUGCourses\u002F5.junior-spring\u002Findex","\u002Fugcourses\u002Fjunior-spring","大三春夏",{"text":80,"minutes":81,"time":81,"words":81},{"stem":901,"path":902,"title":903,"date":78,"collapsed":9,"readingTime":904},"posts\u002FUGCourses\u002Findex","\u002Fugcourses","本科课程",{"text":80,"minutes":81,"time":81,"words":81},{"stem":906,"path":907,"title":908,"date":909,"collapsed":9,"readingTime":910},"posts\u002Fubuntu\u002F1.config","\u002Fubuntu\u002Fconfig","ubuntu 系统配置","2025-08-26 19:38:06",{"text":158,"minutes":911,"time":912,"words":913},3.815,228900,763,{"stem":915,"path":916,"title":917,"date":918,"collapsed":9,"readingTime":919},"posts\u002Fubuntu\u002F2.cadence\u002F1.mmsim","\u002Fubuntu\u002Fcadence\u002Fmmsim","在 Ubuntu 24.04 上安装 Cadence MMSIM 15.1 的兼容性问题","2026-09-09 14:06:40",{"text":158,"minutes":920,"time":921,"words":922},3.5,210000,700,{"stem":924,"path":925,"title":926,"date":918,"collapsed":9,"readingTime":927},"posts\u002Fubuntu\u002F2.cadence\u002F2.innovus","\u002Fubuntu\u002Fcadence\u002Finnovus","Innovus安装",{"text":11,"minutes":928,"time":929,"words":930},2.08,124800,416,{"stem":932,"path":933,"title":934,"date":918,"collapsed":9,"readingTime":935},"posts\u002Fubuntu\u002F2.cadence\u002Findex","\u002Fubuntu\u002Fcadence","Ubuntu24.04安装Cadence 系列软件",{"text":269,"minutes":936,"time":937,"words":938},9.98,598800,1996,{"stem":940,"path":941,"title":942,"date":918,"collapsed":9,"readingTime":943},"posts\u002Fubuntu\u002F3.synopsys","\u002Fubuntu\u002Fsynopsys","Ubuntu 24.04 安装 Synopsys",{"text":269,"minutes":944,"time":945,"words":946},9.555,573300,1911,{"stem":948,"path":949,"title":950,"date":918,"collapsed":9,"readingTime":951},"posts\u002Fubuntu\u002F4.vivado","\u002Fubuntu\u002Fvivado","Ubuntu 24.04 安装 Vivado 2020.1",{"text":60,"minutes":952,"time":953,"words":954},0.62,37200,124,{"stem":956,"path":957,"title":958,"date":918,"collapsed":9,"readingTime":959},"posts\u002Fubuntu\u002F5.migrate","\u002Fubuntu\u002Fmigrate","硬盘迁移系统",{"text":60,"minutes":960,"time":961,"words":962},0.64,38400,128,{"stem":964,"path":965,"title":966,"date":967,"collapsed":9,"readingTime":968},"posts\u002Fubuntu\u002Findex","\u002Fubuntu","Ubuntu装进移动硬盘","2025-08-25 19:38:06",{"text":269,"minutes":969,"time":970,"words":971},9.26,555600,1852,{"id":973,"title":817,"body":974,"categories":5422,"collapsed":9,"date":653,"description":5423,"draft":9,"extension":5424,"hideInArchive":343,"hideInList":343,"image":5425,"meta":5426,"navigation":343,"path":816,"permalink":5425,"published":5425,"readingTime":5428,"recommend":5425,"references":5425,"seo":5429,"sitemap":5430,"stem":815,"tags":5564,"type":5567,"updated":653,"__hash__":5568},"content\u002Fposts\u002FUGCourses\u002F5.junior-spring\u002F2.computerOrganization\u002F13.L13-14-ComplexPipeline.md",{"type":975,"value":976,"toc":5316},"minimark",[977,981,984,1002,1007,1012,1017,1020,1023,1026,1029,1035,1039,1042,1045,1048,1051,1054,1059,1063,1066,1069,1072,1077,1081,1084,1087,1092,1096,1099,1102,1105,1110,1114,1117,1120,1123,1128,1132,1135,1138,1141,1146,1150,1205,1208,1211,1216,1221,1226,1230,1233,1236,1239,1244,1249,1253,1256,1259,1262,1267,1271,1274,1277,1293,1296,1301,1306,1309,1313,1318,1322,1328,1331,1342,1345,1348,1353,1357,1360,1406,1409,1414,1418,1421,1424,1477,1480,1498,1503,1507,1510,1513,1527,1530,1544,1549,1554,1558,1561,1564,1600,1603,1609,1612,1627,1632,1636,1641,1644,1661,1667,1671,1674,1677,1683,1686,1692,1695,1701,1707,1712,1716,1722,1725,1736,1739,1742,1767,1771,1774,1780,1783,1797,1800,1814,1816,1820,1825,1829,1832,1835,1838,1844,1847,1852,1854,1858,1861,1890,1893,1895,1899,1902,1905,1910,1913,1921,1924,1946,1951,1953,1957,1962,1965,1971,1974,1977,1983,1990,1996,2006,2009,2015,2020,2025,2027,2031,2036,2041,2044,2047,2067,2070,2076,2081,2083,2087,2090,2093,2099,2102,2109,2111,2115,2118,2121,2165,2168,2174,2177,2182,2184,2188,2191,2194,2211,2214,2219,2224,2226,2230,2235,2240,2243,2249,2252,2263,2266,2269,2274,2279,2281,2285,2290,2293,2299,2302,2308,2311,2314,2317,2322,2324,2328,2331,2334,2348,2351,2354,2357,2363,2368,2373,2375,2378,2381,2387,2390,2404,2407,2424,2426,2430,2435,2439,2442,2445,2448,2454,2457,2462,2464,2468,2471,2474,2477,2483,2486,2491,2493,2497,2500,2538,2541,2547,2552,2554,2558,2561,2567,2570,2573,2576,2590,2595,2597,2601,2604,2607,2610,2616,2619,2624,2626,2630,2633,2636,2653,2656,2659,2664,2666,2670,2673,2676,2705,2708,2713,2715,2719,2722,2725,2731,2734,2737,2742,2747,2749,2753,2756,2759,2765,2768,2774,2777,2782,2787,2789,2793,2796,2799,2805,2808,2811,2817,2820,2825,2830,2835,2837,2841,2844,2847,2850,2856,2859,2862,2867,2869,2873,2876,2905,2908,2911,2914,2919,2921,2925,2928,2931,2942,2945,2948,2955,2961,2964,2969,2974,2979,2984,2986,2990,2993,2996,2999,3028,3031,3036,3038,3042,3045,3062,3064,3070,3073,3078,3083,3088,3093,3095,3098,3101,3107,3110,3124,3127,3141,3143,3147,3152,3156,3159,3197,3203,3208,3210,3214,3217,3223,3225,3231,3242,3245,3259,3264,3266,3270,3273,3301,3304,3307,3310,3316,3321,3323,3327,3330,3366,3369,3375,3378,3414,3419,3439,3459,3479,3484,3486,3490,3493,3499,3506,3512,3515,3534,3543,3545,3551,3553,3557,3560,3563,3592,3594,3602,3607,3609,3613,3616,3622,3625,3642,3645,3651,3656,3658,3662,3665,3668,3674,3676,3682,3685,3688,3702,3707,3712,3714,3717,3720,3726,3728,3745,3747,3764,3766,3770,3775,3779,3782,3793,3796,3807,3810,3837,3840,3845,3847,3851,3861,3864,3870,3873,3876,3881,3883,3887,3890,3893,3899,3902,3916,3921,3923,3927,3930,3933,3936,3942,3945,3982,3987,3992,3994,3998,4001,4003,4017,4020,4025,4027,4031,4034,4037,4043,4046,4051,4056,4061,4063,4067,4070,4073,4076,4079,4085,4088,4093,4095,4099,4102,4105,4119,4122,4127,4129,4133,4136,4142,4145,4148,4156,4159,4170,4175,4177,4181,4184,4187,4193,4196,4199,4216,4221,4223,4227,4230,4232,4235,4238,4241,4270,4273,4276,4281,4283,4287,4290,4293,4299,4302,4308,4311,4316,4318,4322,4325,4328,4334,4337,4343,4346,4351,4356,4361,4366,4368,4372,4375,4378,4384,4387,4390,4395,4397,4401,4404,4409,4412,4464,4467,4473,4478,4483,4485,4489,4492,4497,4502,4507,4576,4579,4585,4588,4590,4594,4597,4600,4611,4614,4617,4623,4628,4633,4638,4640,4643,4649,4652,4658,4660,4664,4669,4673,4676,4722,4725,4730,4732,4736,4739,4759,4761,4767,4770,4775,4777,4781,4784,4787,4790,4807,4810,4816,4821,4823,4827,4830,4836,4839,4845,4848,4867,4870,4876,4881,4886,4888,4892,4895,4918,4921,4924,4930,4935,4940,4945,4947,4951,4954,4957,5001,5004,5021,5024,5026,5030,5033,5047,5050,5056,5059,5064,5069,5074,5076,5080,5085,5088,5091,5120,5123,5129,5132,5135,5138,5140,5144,5149,5152,5189,5192,5198,5201,5204,5206,5210,5213,5216,5233,5236,5239,5245,5248,5253,5258,5263,5268,5273,5275,5279,5284,5287,5290,5293,5299,5301,5304,5307,5310],[978,979,980],"p",{},"还没仔细理，主要就理了一下ppt结构，ppt全部截进来了",[978,982,983],{},"AI根据作业和历年卷总结的重点为：",[985,986,988,995],"alert",{"type":987},"tip",[978,989,990,991],{},"重点在：",[992,993,994],"strong",{},"BHT\u002FBTB、分支预测、RAW\u002FWAR\u002FWAW、寄存器重命名、ROB、乱序发射、精确异常。",[978,996,997,998,1001],{},"深度要求：",[992,999,1000],{},"能解释乱序执行为什么需要重命名和 ROB，能比较 BHT\u002FBTB","。",[1003,1004,1006],"h2",{"id":1005},"_1-ooo-基本概念简单回顾基本都是l7的内容","1. OoO 基本概念（简单回顾，基本都是L7的内容）",[978,1008,1009],{},[992,1010,1011],{},"OoO Basic Concepts",[1013,1014,1016],"h3",{"id":1015},"_11-流水线中的指令交互","1.1 流水线中的指令交互",[978,1018,1019],{},"简单回顾一下：",[978,1021,1022],{},"流水线中，指令之间可能互相影响，形成三类冒险：",[978,1024,1025],{},"结构冒险、数据冒险、控制冒险。",[978,1027,1028],{},"这些冒险会引入 bubble，使 CPI 增大，性能下降。",[978,1030,1031],{},[1032,1033],"img",{"alt":1032,"src":1034},"\u002Fimg\u002FComputerOrganization\u002FL13-14-ComplexPipeline-01.png",[1013,1036,1038],{"id":1037},"_12-数据冒险的基本处理策略","1.2 数据冒险的基本处理策略",[978,1040,1041],{},"主要有三种方法：",[978,1043,1044],{},"停顿、前递、推测。",[978,1046,1047],{},"停顿保证正确性，但降低性能。",[978,1049,1050],{},"前递减少等待，但硬件更复杂。",[978,1052,1053],{},"推测提高并行度，但错误时需要恢复。",[978,1055,1056],{},[1032,1057],{"alt":1032,"src":1058},"\u002Fimg\u002FComputerOrganization\u002FL13-14-ComplexPipeline-02.png",[1013,1060,1062],{"id":1061},"_13-停顿与前递","1.3 停顿与前递",[978,1064,1065],{},"停顿是让相关指令等待结果写回。",[978,1067,1068],{},"前递是不等写回，直接把计算结果送给后续指令。",[978,1070,1071],{},"前递可以减少甚至消除部分数据冒险带来的 bubble。",[978,1073,1074],{},[1032,1075],{"alt":1032,"src":1076},"\u002Fimg\u002FComputerOrganization\u002FL13-14-ComplexPipeline-03.png",[1013,1078,1080],{"id":1079},"_14-完全旁通数据通路","1.4 完全旁通数据通路",[978,1082,1083],{},"Fully Bypass Data Path 允许结果从流水线中间阶段直接传给后续指令。",[978,1085,1086],{},"这样后续指令不必等寄存器写回，就可以使用结果。",[978,1088,1089],{},[1032,1090],{"alt":1032,"src":1091},"\u002Fimg\u002FComputerOrganization\u002FL13-14-ComplexPipeline-04.png",[1013,1093,1095],{"id":1094},"_15-寄存器依赖与内存依赖","1.5 寄存器依赖与内存依赖",[978,1097,1098],{},"寄存器依赖通常在 Decode 阶段即可判断。",[978,1100,1101],{},"内存依赖必须等有效地址计算后才能判断。",[978,1103,1104],{},"因此内存相关性比寄存器相关性更难处理。",[978,1106,1107],{},[1032,1108],{"alt":1032,"src":1109},"\u002Fimg\u002FComputerOrganization\u002FL13-14-ComplexPipeline-05.png",[1013,1111,1113],{"id":1112},"_16-复杂流水线的动机","1.6 复杂流水线的动机",[978,1115,1116],{},"高性能处理器中会出现：",[978,1118,1119],{},"长延迟 FPU、可变延迟内存、多功能单元。",[978,1121,1122],{},"这些因素使简单五级流水线难以满足性能需求。",[978,1124,1125],{},[1032,1126],{"alt":1032,"src":1127},"\u002Fimg\u002FComputerOrganization\u002FL13-14-ComplexPipeline-06.png",[1013,1129,1131],{"id":1130},"_17-复杂流水线中的新问题","1.7 复杂流水线中的新问题",[978,1133,1134],{},"复杂流水线会带来新的冲突：",[978,1136,1137],{},"执行阶段结构冒险、写回阶段结构冒险、乱序写回、异常处理困难。",[978,1139,1140],{},"核心问题是：不同指令的执行时间不再统一。",[978,1142,1143],{},[1032,1144],{"alt":1032,"src":1145},"\u002Fimg\u002FComputerOrganization\u002FL13-14-ComplexPipeline-07.png",[1013,1147,1149],{"id":1148},"_18-数据冒险类型","1.8 数据冒险类型",[1151,1152,1153,1169],"table",{},[1154,1155,1156],"thead",{},[1157,1158,1159,1163,1166],"tr",{},[1160,1161,1162],"th",{},"类型",[1160,1164,1165],{},"含义",[1160,1167,1168],{},"本质",[1170,1171,1172,1184,1195],"tbody",{},[1157,1173,1174,1178,1181],{},[1175,1176,1177],"td",{},"RAW",[1175,1179,1180],{},"写后读",[1175,1182,1183],{},"真正数据依赖",[1157,1185,1186,1189,1192],{},[1175,1187,1188],{},"WAR",[1175,1190,1191],{},"读后写",[1175,1193,1194],{},"名称依赖",[1157,1196,1197,1200,1203],{},[1175,1198,1199],{},"WAW",[1175,1201,1202],{},"写后写",[1175,1204,1194],{},[978,1206,1207],{},"RAW 不能消除。",[978,1209,1210],{},"WAR 和 WAW 可通过寄存器重命名消除。",[978,1212,1213],{},[1032,1214],{"alt":1032,"src":1215},"\u002Fimg\u002FComputerOrganization\u002FL13-14-ComplexPipeline-08.png",[978,1217,1218],{},[1032,1219],{"alt":1032,"src":1220},"\u002Fimg\u002FComputerOrganization\u002FL13-14-ComplexPipeline-09.png",[978,1222,1223],{},[1032,1224],{"alt":1032,"src":1225},"\u002Fimg\u002FComputerOrganization\u002FL13-14-ComplexPipeline-10.png",[1013,1227,1229],{"id":1228},"_19-从复杂顺序流水线到乱序执行","1.9 从复杂顺序流水线到乱序执行",[978,1231,1232],{},"一种保守方法是延迟写回，使所有指令在统一阶段写回。",[978,1234,1235],{},"这样便于控制冒险和异常，但会拖慢短延迟指令。",[978,1237,1238],{},"因此需要更高效的方法：乱序执行。",[978,1240,1241],{},[1032,1242],{"alt":1032,"src":1243},"\u002Fimg\u002FComputerOrganization\u002FL13-14-ComplexPipeline-11.png",[978,1245,1246],{},[1032,1247],{"alt":1032,"src":1248},"\u002Fimg\u002FComputerOrganization\u002FL13-14-ComplexPipeline-12.png",[1013,1250,1252],{"id":1251},"_110-什么是乱序执行","1.10 什么是乱序执行",[978,1254,1255],{},"OoO 指：只要操作数准备好、功能单元可用，指令就可以先执行。",[978,1257,1258],{},"程序顺序不一定等于执行顺序。",[978,1260,1261],{},"但最终结果必须保持程序语义正确。",[978,1263,1264],{},[1032,1265],{"alt":1032,"src":1266},"\u002Fimg\u002FComputerOrganization\u002FL13-14-ComplexPipeline-13.png",[1013,1268,1270],{"id":1269},"_111-为什么使用乱序执行","1.11 为什么使用乱序执行",[978,1272,1273],{},"乱序执行的目的不是“打乱顺序”，而是提高性能。",[978,1275,1276],{},"它可以：",[1278,1279,1280,1284,1287,1290],"ul",{},[1281,1282,1283],"li",{},"容忍长延迟；",[1281,1285,1286],{},"挖掘指令级并行性；",[1281,1288,1289],{},"提高功能单元利用率；",[1281,1291,1292],{},"减少流水线空等。",[978,1294,1295],{},"代价是硬件复杂、面积大、功耗高。",[978,1297,1298],{},[1032,1299],{"alt":1032,"src":1300},"\u002Fimg\u002FComputerOrganization\u002FL13-14-ComplexPipeline-14.png",[978,1302,1303],{},[1032,1304],{"alt":1032,"src":1305},"\u002Fimg\u002FComputerOrganization\u002FL13-14-ComplexPipeline-15.png",[1307,1308],"hr",{},[1003,1310,1312],{"id":1311},"_2-顺序发射","2. 顺序发射",[978,1314,1315],{},[992,1316,1317],{},"In-Order Issue",[1013,1319,1321],{"id":1320},"_21-指令调度","2.1 指令调度",[978,1323,1324,1325,1001],{},"指令调度关注的是：",[992,1326,1327],{},"指令以什么顺序进入执行阶段",[978,1329,1330],{},"顺序发射要求：",[1332,1333,1338],"pre",{"className":1334,"code":1336,"language":1337},[1335],"language-text","I1 → I2 → I3 → I4 → I5 → I6\n","text",[1339,1340,1336],"code",{"__ignoreMap":1341},"",[978,1343,1344],{},"也就是后一条指令不能越过前一条指令先发射。",[978,1346,1347],{},"即使后面的指令已经准备好，只要前面的指令不能发射，后面的也要等待。",[978,1349,1350],{},[1032,1351],{"alt":1032,"src":1352},"\u002Fimg\u002FComputerOrganization\u002FL13-14-ComplexPipeline-16.png",[1013,1354,1356],{"id":1355},"_22-指令何时可以安全发射","2.2 指令何时可以安全发射",[978,1358,1359],{},"在 Issue 阶段，发射一条指令前需要检查：",[1151,1361,1362,1372],{},[1154,1363,1364],{},[1157,1365,1366,1369],{},[1160,1367,1368],{},"检查内容",[1160,1370,1371],{},"目的",[1170,1373,1374,1382,1390,1398],{},[1157,1375,1376,1379],{},[1175,1377,1378],{},"功能单元是否可用",[1175,1380,1381],{},"避免结构冒险",[1157,1383,1384,1387],{},[1175,1385,1386],{},"源操作数是否可用",[1175,1388,1389],{},"避免 RAW 冒险",[1157,1391,1392,1395],{},[1175,1393,1394],{},"目的寄存器是否安全",[1175,1396,1397],{},"避免 WAR \u002F WAW 冒险",[1157,1399,1400,1403],{},[1175,1401,1402],{},"写回端口是否冲突",[1175,1404,1405],{},"避免 WB 阶段结构冒险",[978,1407,1408],{},"如果这些检查都通过，指令才能进入对应功能单元。",[978,1410,1411],{},[1032,1412],{"alt":1032,"src":1413},"\u002Fimg\u002FComputerOrganization\u002FL13-14-ComplexPipeline-17.png",[1013,1415,1417],{"id":1416},"_23-正确发射所需的数据结构","2.3 正确发射所需的数据结构",[978,1419,1420],{},"为了判断能否发射，需要记录功能单元中正在执行的指令状态。",[978,1422,1423],{},"典型表项包括：",[1151,1425,1426,1435],{},[1154,1427,1428],{},[1157,1429,1430,1433],{},[1160,1431,1432],{},"字段",[1160,1434,1165],{},[1170,1436,1437,1445,1453,1461,1469],{},[1157,1438,1439,1442],{},[1175,1440,1441],{},"Name",[1175,1443,1444],{},"功能单元名称",[1157,1446,1447,1450],{},[1175,1448,1449],{},"Busy",[1175,1451,1452],{},"是否被占用",[1157,1454,1455,1458],{},[1175,1456,1457],{},"Op",[1175,1459,1460],{},"正在执行的操作",[1157,1462,1463,1466],{},[1175,1464,1465],{},"Dest",[1175,1467,1468],{},"目的寄存器",[1157,1470,1471,1474],{},[1175,1472,1473],{},"Src1 \u002F Src2",[1175,1475,1476],{},"源寄存器",[978,1478,1479],{},"发射时通过这个表检查：",[1278,1481,1482,1487,1492],{},[1281,1483,1484,1486],{},[1339,1485,1449],{"code":1449},"：功能单元是否空闲；",[1281,1488,1489,1491],{},[1339,1490,1465],{"code":1465},"：是否有 RAW \u002F WAW；",[1281,1493,1494,1497],{},[1339,1495,1496],{"code":1496},"Src","：是否有 WAR。",[978,1499,1500],{},[1032,1501],{"alt":1032,"src":1502},"\u002Fimg\u002FComputerOrganization\u002FL13-14-ComplexPipeline-18.png",[1013,1504,1506],{"id":1505},"_24-顺序发射的数据结构简化","2.4 顺序发射的数据结构简化",[978,1508,1509],{},"在顺序发射中，指令按程序顺序进入功能单元。",[978,1511,1512],{},"因此：",[1278,1514,1515,1518,1521],{},[1281,1516,1517],{},"操作数通常在 Issue 阶段就被读取；",[1281,1519,1520],{},"后面的指令不会先于前面的指令读取操作数；",[1281,1522,1523,1524,1001],{},"所以 ",[992,1525,1526],{},"WAR 冒险不会发生",[978,1528,1529],{},"但仍然需要处理：",[1278,1531,1532,1535,1538,1541],{},[1281,1533,1534],{},"RAW；",[1281,1536,1537],{},"WAW；",[1281,1539,1540],{},"功能单元冲突；",[1281,1542,1543],{},"写回冲突。",[978,1545,1546],{},[1032,1547],{"alt":1032,"src":1548},"\u002Fimg\u002FComputerOrganization\u002FL13-14-ComplexPipeline-19.png",[978,1550,1551],{},[1032,1552],{"alt":1032,"src":1553},"\u002Fimg\u002FComputerOrganization\u002FL13-14-ComplexPipeline-20.png",[1013,1555,1557],{"id":1556},"_25-scoreboard-记分板","2.5 Scoreboard 记分板",[978,1559,1560],{},"顺序发射可以用简化的 scoreboard 管理状态。",[978,1562,1563],{},"主要记录两个 bit-vector：",[1151,1565,1566,1576],{},[1154,1567,1568],{},[1157,1569,1570,1573],{},[1160,1571,1572],{},"结构",[1160,1574,1575],{},"作用",[1170,1577,1578,1589],{},[1157,1579,1580,1586],{},[1175,1581,1449,1582],{},[1583,1584,1585],"span",{},"FU#",[1175,1587,1588],{},"记录功能单元是否忙",[1157,1590,1591,1597],{},[1175,1592,1593,1594],{},"WP",[1583,1595,1596],{},"reg#",[1175,1598,1599],{},"记录某个寄存器是否正在等待写回",[978,1601,1602],{},"发射一条指令时：",[1332,1604,1607],{"className":1605,"code":1606,"language":1337},[1335],"功能单元可用？ → 看 Busy[FU]\nRAW？ → 看 WP[src1] 或 WP[src2]\nWAW？ → 看 WP[dest]\nWAR？ → 顺序发射中不会发生\n",[1339,1608,1606],{"__ignoreMap":1341},[978,1610,1611],{},"如果可以发射：",[1278,1613,1614,1617,1624],{},[1281,1615,1616],{},"设置对应功能单元 Busy；",[1281,1618,1619,1620,1623],{},"设置 ",[1339,1621,1622],{"code":1622},"WP[dest]","；",[1281,1625,1626],{},"等写回后再清除。",[978,1628,1629],{},[1032,1630],{"alt":1032,"src":1631},"\u002Fimg\u002FComputerOrganization\u002FL13-14-ComplexPipeline-21.png",[1013,1633,1635],{"id":1634},"_26-记分板动态示例","2.6 记分板动态示例",[978,1637,1638],{},[1032,1639],{"alt":1032,"src":1640},"\u002Fimg\u002FComputerOrganization\u002FL13-14-ComplexPipeline-22.png",[978,1642,1643],{},"核心逻辑是：",[1278,1645,1646,1652,1658],{},[1281,1647,1648,1649,1651],{},"如果源寄存器还在 ",[1339,1650,1593],{"code":1593}," 中，说明数据未准备好，不能发射；",[1281,1653,1654,1655,1657],{},"如果目的寄存器已在 ",[1339,1656,1593],{"code":1593}," 中，说明存在 WAW，不能发射；",[1281,1659,1660],{},"如果功能单元忙，也不能发射。",[978,1662,1663,1664,1001],{},"所以 scoreboard 的作用是：",[992,1665,1666],{},"在不乱发射的前提下，保证指令按顺序安全进入功能单元",[1013,1668,1670],{"id":1669},"_27-乱序完成顺序发射","2.7 乱序完成、顺序发射",[978,1672,1673],{},"顺序发射不代表顺序完成。",[978,1675,1676],{},"原因是不同功能单元延迟不同：",[1332,1678,1681],{"className":1679,"code":1680,"language":1337},[1335],"Load 可能 1 周期完成\nFAdd 可能 1 周期完成\nFMul 可能 3 周期完成\nFDiv 可能 4 周期完成\n",[1339,1682,1680],{"__ignoreMap":1341},[978,1684,1685],{},"所以即使发射顺序是：",[1332,1687,1690],{"className":1688,"code":1689,"language":1337},[1335],"I1 → I2 → I3 → I4\n",[1339,1691,1689],{"__ignoreMap":1341},[978,1693,1694],{},"完成顺序也可能是：",[1332,1696,1699],{"className":1697,"code":1698,"language":1337},[1335],"I2 → I1 → I3 → I4\n",[1339,1700,1698],{"__ignoreMap":1341},[978,1702,1703,1704,1001],{},"这就是：",[992,1705,1706],{},"顺序发射，乱序完成",[978,1708,1709],{},[1032,1710],{"alt":1032,"src":1711},"\u002Fimg\u002FComputerOrganization\u002FL13-14-ComplexPipeline-23.png",[1013,1713,1715],{"id":1714},"_28-顺序发射的局限","2.8 顺序发射的局限",[978,1717,1718,1719,1001],{},"顺序发射最大的局限是：",[992,1720,1721],{},"前面指令卡住，会阻塞后面所有指令",[978,1723,1724],{},"即使后面的指令：",[1278,1726,1727,1730,1733],{},[1281,1728,1729],{},"不依赖前面的数据；",[1281,1731,1732],{},"功能单元也空闲；",[1281,1734,1735],{},"本来可以执行；",[978,1737,1738],{},"也不能越过前面的指令先发射。",[978,1740,1741],{},"因此，顺序发射无法充分挖掘 ILP，会浪费可用的功能单元。",[1151,1743,1745],{"style":1744},"width: 100%; border: 0; border-collapse: collapse; border-spacing: 0;",[1170,1746,1747],{},[1157,1748,1750,1751,1750,1759],{"style":1749},"border: none;","\n  ",[1175,1752,1754,1750],{"style":1753},"width: 49.0%; text-align: center; border: none; padding: 0.3em; margin: 0;",[978,1755,1756],{},[1032,1757],{"alt":1032,"src":1758},"\u002Fimg\u002FComputerOrganization\u002FL13-14-ComplexPipeline-24.png",[1175,1760,1762,1750],{"style":1761},"width: 50.0%; text-align: center; border: none; padding: 0.3em; margin: 0;",[978,1763,1764],{},[1032,1765],{"alt":1032,"src":1766},"\u002Fimg\u002FComputerOrganization\u002FL13-14-ComplexPipeline-25.png",[1013,1768,1770],{"id":1769},"总结","总结：",[978,1772,1773],{},"顺序发射的核心机制是：",[1332,1775,1778],{"className":1776,"code":1777,"language":1337},[1335],"按程序顺序检查指令 → 确认无冒险 → 发射到功能单元\n",[1339,1779,1777],{"__ignoreMap":1341},[978,1781,1782],{},"它的优点是：",[1278,1784,1785,1788,1791,1794],{},[1281,1786,1787],{},"控制简单；",[1281,1789,1790],{},"冒险判断相对容易；",[1281,1792,1793],{},"WAR 不会发生；",[1281,1795,1796],{},"容易保证程序语义。",[978,1798,1799],{},"它的缺点是：",[1278,1801,1802,1805,1808,1811],{},[1281,1803,1804],{},"前面指令会阻塞后面指令；",[1281,1806,1807],{},"功能单元利用率不高；",[1281,1809,1810],{},"无法充分利用指令级并行性；",[1281,1812,1813],{},"面对长延迟指令时性能损失明显。",[1307,1815],{},[1003,1817,1819],{"id":1818},"_3-乱序发射","3. 乱序发射",[978,1821,1822],{},[992,1823,1824],{},"Out-of-Order Issue",[1013,1826,1828],{"id":1827},"_31-乱序发射机制","3.1 乱序发射机制",[978,1830,1831],{},"顺序发射中，前面的指令卡住，后面的指令也不能发射。",[978,1833,1834],{},"乱序发射则在 Issue 阶段设置一个缓冲区，保存多条等待发射的指令。",[978,1836,1837],{},"基本规则是：",[1332,1839,1842],{"className":1840,"code":1841,"language":1337},[1335],"只要指令的源操作数准备好，功能单元可用，就可以先发射。\n",[1339,1843,1841],{"__ignoreMap":1341},[978,1845,1846],{},"因此，后面的独立指令可以越过前面被阻塞的指令先执行。",[978,1848,1849],{},[1032,1850],{"alt":1032,"src":1851},"\u002Fimg\u002FComputerOrganization\u002FL13-14-ComplexPipeline-26.png",[1307,1853],{},[1013,1855,1857],{"id":1856},"_32-流水线中可容纳多少指令","3.2 流水线中可容纳多少指令",[978,1859,1860],{},"流水线中可同时存在多少条指令，主要受两个因素限制：",[1151,1862,1863,1872],{},[1154,1864,1865],{},[1157,1866,1867,1870],{},[1160,1868,1869],{},"限制来源",[1160,1871,1165],{},[1170,1873,1874,1882],{},[1157,1875,1876,1879],{},[1175,1877,1878],{},"ISA 寄存器数量",[1175,1880,1881],{},"寄存器名太少会造成 WAR \u002F WAW 名称冲突",[1157,1883,1884,1887],{},[1175,1885,1886],{},"控制流转移",[1175,1888,1889],{},"分支会限制可连续取到的指令数量",[978,1891,1892],{},"所以，仅有乱序调度还不够，还需要解决寄存器名不足和分支控制流问题。",[1307,1894],{},[1013,1896,1898],{"id":1897},"_33-寄存器名称不足问题","3.3 寄存器名称不足问题",[978,1900,1901],{},"ISA 中的寄存器数量有限。",[978,1903,1904],{},"例如浮点寄存器较少时，多条无关指令可能因为用了相同寄存器名而产生冲突。",[978,1906,1907,1908,1001],{},"这些冲突不一定是真正的数据依赖，而是",[992,1909,1194],{},[978,1911,1912],{},"典型包括：",[1278,1914,1915,1918],{},[1281,1916,1917],{},"WAR；",[1281,1919,1920],{},"WAW。",[978,1922,1923],{},"如果不处理这些名称依赖，乱序发射的空间会很小。",[1151,1925,1926],{"style":1744},[1170,1927,1928],{},[1157,1929,1750,1930,1750,1938],{"style":1749},[1175,1931,1933,1750],{"style":1932},"width: 43.0%; text-align: center; border: none; padding: 0.3em; margin: 0;",[978,1934,1935],{},[1032,1936],{"alt":1032,"src":1937},"\u002Fimg\u002FComputerOrganization\u002FL13-14-ComplexPipeline-27.png",[1175,1939,1941,1750],{"style":1940},"width: 56.0%; text-align: center; border: none; padding: 0.3em; margin: 0;",[978,1942,1943],{},[1032,1944],{"alt":1032,"src":1945},"\u002Fimg\u002FComputerOrganization\u002FL13-14-ComplexPipeline-28.png",[978,1947,1948],{},[1032,1949],{"alt":1032,"src":1950},"\u002Fimg\u002FComputerOrganization\u002FL13-14-ComplexPipeline-29.png",[1307,1952],{},[1013,1954,1956],{"id":1955},"_34-寄存器重命名","3.4 寄存器重命名",[978,1958,1959],{},[1032,1960],{"alt":1032,"src":1961},"\u002Fimg\u002FComputerOrganization\u002FL13-14-ComplexPipeline-30.png",[978,1963,1964],{},"寄存器重命名的作用是：",[1332,1966,1969],{"className":1967,"code":1968,"language":1337},[1335],"把架构寄存器名映射到更多的内部物理寄存器或 ROB 标签。\n",[1339,1970,1968],{"__ignoreMap":1341},[978,1972,1973],{},"这样可以消除 WAR 和 WAW。",[978,1975,1976],{},"例如原本：",[1332,1978,1981],{"className":1979,"code":1980,"language":1337},[1335],"DIVD F4, F2, F8\nADDD F10, F6, F4\n",[1339,1982,1980],{"__ignoreMap":1341},[978,1984,1985,1986,1989],{},"如果后面又要写 ",[1339,1987,1988],{"code":1988},"F4","，可能产生名称冲突。\n重命名后可以变成：",[1332,1991,1994],{"className":1992,"code":1993,"language":1337},[1335],"DIVD F4', F2, F8\nADDD F10, F6, F4'\n",[1339,1995,1993],{"__ignoreMap":1341},[978,1997,1998,1999,2002,2003,2005],{},"这样新的 ",[1339,2000,2001],{"code":2001},"F4'"," 和旧的 ",[1339,2004,1988],{"code":1988}," 不再混淆。",[978,2007,2008],{},"结论：",[1332,2010,2013],{"className":2011,"code":2012,"language":1337},[1335],"RAW 是真实依赖，不能消除；\nWAR \u002F WAW 是名称依赖，可以通过重命名消除。\n",[1339,2014,2012],{"__ignoreMap":1341},[978,2016,2017],{},[1032,2018],{"alt":1032,"src":2019},"\u002Fimg\u002FComputerOrganization\u002FL13-14-ComplexPipeline-31.png",[978,2021,2022],{},[1032,2023],{"alt":1032,"src":2024},"\u002Fimg\u002FComputerOrganization\u002FL13-14-ComplexPipeline-32.png",[1307,2026],{},[1013,2028,2030],{"id":2029},"_35-rob-重排序缓冲区","3.5 ROB 重排序缓冲区",[978,2032,2033],{},[1032,2034],{"alt":1032,"src":2035},"\u002Fimg\u002FComputerOrganization\u002FL13-14-ComplexPipeline-33.png",[978,2037,2038],{},[1032,2039],{"alt":1032,"src":2040},"\u002Fimg\u002FComputerOrganization\u002FL13-14-ComplexPipeline-34.png",[978,2042,2043],{},"ROB，即 Reorder Buffer，用来保存已经解码但还未最终提交的指令。",[978,2045,2046],{},"它的作用包括：",[1278,2048,2049,2052,2055,2058,2061,2064],{},[1281,2050,2051],{},"保存指令状态；",[1281,2053,2054],{},"保存操作数或操作数标签；",[1281,2056,2057],{},"保存执行结果；",[1281,2059,2060],{},"保存异常信息；",[1281,2062,2063],{},"支持乱序执行；",[1281,2065,2066],{},"支持顺序提交。",[978,2068,2069],{},"简单理解：",[1332,2071,2074],{"className":2072,"code":2073,"language":1337},[1335],"ROB 让指令可以乱序执行，但最后仍然按程序顺序提交。\n",[1339,2075,2073],{"__ignoreMap":1341},[978,2077,2078],{},[1032,2079],{"alt":1032,"src":2080},"\u002Fimg\u002FComputerOrganization\u002FL13-14-ComplexPipeline-35.png",[1307,2082],{},[1013,2084,2086],{"id":2085},"_36-数据驱动执行","3.6 数据驱动执行",[978,2088,2089],{},"乱序发射的执行方式接近数据流模型。",[978,2091,2092],{},"一条指令能否发射，主要看两个条件：",[1332,2094,2097],{"className":2095,"code":2096,"language":1337},[1335],"源操作数是否都准备好？\n功能单元是否可用？\n",[1339,2098,2096],{"__ignoreMap":1341},[978,2100,2101],{},"只要满足条件，就可以从 Issue Buffer \u002F ROB 中被选中执行。",[978,2103,2104,2105,2108],{},"这叫 ",[992,2106,2107],{},"data-driven execution","，也就是由数据是否准备好来驱动执行顺序。",[1307,2110],{},[1013,2112,2114],{"id":2113},"_37-tomasulo-算法思想","3.7 Tomasulo 算法思想",[978,2116,2117],{},"Tomasulo 算法是早期乱序执行的重要实现方法。",[978,2119,2120],{},"核心思想包括：",[1151,2122,2123,2131],{},[1154,2124,2125],{},[1157,2126,2127,2129],{},[1160,2128,1572],{},[1160,2130,1575],{},[1170,2132,2133,2141,2149,2157],{},[1157,2134,2135,2138],{},[1175,2136,2137],{},"Reservation Station",[1175,2139,2140],{},"保存等待执行的指令",[1157,2142,2143,2146],{},[1175,2144,2145],{},"Tag",[1175,2147,2148],{},"标记数据来源",[1157,2150,2151,2154],{},[1175,2152,2153],{},"Common Data Bus",[1175,2155,2156],{},"广播执行结果",[1157,2158,2159,2162],{},[1175,2160,2161],{},"Register Renaming",[1175,2163,2164],{},"消除名称依赖",[978,2166,2167],{},"当某个功能单元产生结果时，会广播：",[1332,2169,2172],{"className":2170,"code":2171,"language":1337},[1335],"\u003Ctag, result>\n",[1339,2173,2171],{"__ignoreMap":1341},[978,2175,2176],{},"等待这个 tag 的指令收到结果后，就可以继续执行。",[978,2178,2179],{},[1032,2180],{"alt":1032,"src":2181},"\u002Fimg\u002FComputerOrganization\u002FL13-14-ComplexPipeline-36.png",[1307,2183],{},[1013,2185,2187],{"id":2186},"_38-乱序执行早期受限原因","3.8 乱序执行早期受限原因",[978,2189,2190],{},"乱序执行在 1960 年代已经出现，但很长时间没有广泛流行。",[978,2192,2193],{},"主要原因是：",[1278,2195,2196,2199,2202,2205,2208],{},[1281,2197,2198],{},"精确异常难实现；",[1281,2200,2201],{},"当时可利用的 ILP 有限；",[1281,2203,2204],{},"内存延迟问题更突出；",[1281,2206,2207],{},"控制流分支限制严重；",[1281,2209,2210],{},"硬件复杂度和成本较高。",[978,2212,2213],{},"所以 OoO 真正普及是在 1990 年代之后。",[978,2215,2216],{},[1032,2217],{"alt":1032,"src":2218},"\u002Fimg\u002FComputerOrganization\u002FL13-14-ComplexPipeline-37.png",[978,2220,2221],{},[1032,2222],{"alt":1032,"src":2223},"\u002Fimg\u002FComputerOrganization\u002FL13-14-ComplexPipeline-38.png",[1307,2225],{},[1013,2227,2229],{"id":2228},"_39-精确中断与异常","3.9 精确中断与异常",[978,2231,2232],{},[1032,2233],{"alt":1032,"src":2234},"\u002Fimg\u002FComputerOrganization\u002FL13-14-ComplexPipeline-39.png",[978,2236,2237],{},[1032,2238],{"alt":1032,"src":2239},"\u002Fimg\u002FComputerOrganization\u002FL13-14-ComplexPipeline-40.png",[978,2241,2242],{},"精确中断要求处理器状态看起来像是：",[1332,2244,2247],{"className":2245,"code":2246,"language":1337},[1335],"中断发生在两条指令之间。\n",[1339,2248,2246],{"__ignoreMap":1341},[978,2250,2251],{},"具体要求：",[1278,2253,2254,2257,2260],{},[1281,2255,2256],{},"中断前的所有指令都已经完成；",[1281,2258,2259],{},"中断后的所有指令都没有产生影响；",[1281,2261,2262],{},"程序可以从正确位置重新开始。",[978,2264,2265],{},"乱序执行的问题是：",[978,2267,2268],{},"后面的指令可能已经先完成，因此异常处理会变复杂。",[978,2270,2271],{},[1032,2272],{"alt":1032,"src":2273},"\u002Fimg\u002FComputerOrganization\u002FL13-14-ComplexPipeline-41.png",[978,2275,2276],{},[1032,2277],{"alt":1032,"src":2278},"\u002Fimg\u002FComputerOrganization\u002FL13-14-ComplexPipeline-42.png",[1307,2280],{},[1013,2282,2284],{"id":2283},"_310-顺序提交实现精确异常","3.10 顺序提交实现精确异常",[978,2286,2287],{},[1032,2288],{"alt":1032,"src":2289},"\u002Fimg\u002FComputerOrganization\u002FL13-14-ComplexPipeline-43.png",[978,2291,2292],{},"解决方法是：",[1332,2294,2297],{"className":2295,"code":2296,"language":1337},[1335],"执行可以乱序，但提交必须顺序。\n",[1339,2298,2296],{"__ignoreMap":1341},[978,2300,2301],{},"也就是：",[1332,2303,2306],{"className":2304,"code":2305,"language":1337},[1335],"Fetch \u002F Decode：顺序\nExecute：乱序\nCommit：顺序\n",[1339,2307,2305],{"__ignoreMap":1341},[978,2309,2310],{},"这样即使指令乱序完成，也不会立刻修改体系结构状态。",[978,2312,2313],{},"只有当它到达 ROB 队头，并且前面指令都已经提交后，才可以正式提交。",[978,2315,2316],{},"这保证了精确异常。",[978,2318,2319],{},[1032,2320],{"alt":1032,"src":2321},"\u002Fimg\u002FComputerOrganization\u002FL13-14-ComplexPipeline-44.png",[1307,2323],{},[1013,2325,2327],{"id":2326},"_311-回滚与重命名表恢复","3.11 回滚与重命名表恢复",[978,2329,2330],{},"如果发生异常或分支预测错误，需要恢复到正确状态。",[978,2332,2333],{},"需要恢复的内容包括：",[1278,2335,2336,2339,2342,2345],{},[1281,2337,2338],{},"PC；",[1281,2340,2341],{},"ROB；",[1281,2343,2344],{},"Rename Table；",[1281,2346,2347],{},"推测执行产生的临时结果。",[978,2349,2350],{},"一种方法是在分支预测时保存 Rename Table 的快照。",[978,2352,2353],{},"如果预测错误，就恢复旧快照，并清除错误路径上的指令。",[978,2355,2356],{},"核心目标是：",[1332,2358,2361],{"className":2359,"code":2360,"language":1337},[1335],"把处理器状态恢复到错误发生前的正确程序状态。\n",[1339,2362,2360],{"__ignoreMap":1341},[978,2364,2365],{},[1032,2366],{"alt":1032,"src":2367},"\u002Fimg\u002FComputerOrganization\u002FL13-14-ComplexPipeline-45.png",[978,2369,2370],{},[1032,2371],{"alt":1032,"src":2372},"\u002Fimg\u002FComputerOrganization\u002FL13-14-ComplexPipeline-46.png",[1307,2374],{},[1003,2376,2377],{"id":2377},"第三部分总结",[978,2379,2380],{},"乱序发射的核心机制是：",[1332,2382,2385],{"className":2383,"code":2384,"language":1337},[1335],"多条指令进入等待区 → 操作数准备好就发射 → 执行乱序 → 提交顺序\n",[1339,2386,2384],{"__ignoreMap":1341},[978,2388,2389],{},"它相比顺序发射的优势是：",[1278,2391,2392,2395,2398,2401],{},[1281,2393,2394],{},"后面的独立指令可以越过前面的阻塞指令；",[1281,2396,2397],{},"更能容忍长延迟；",[1281,2399,2400],{},"更能挖掘 ILP；",[1281,2402,2403],{},"功能单元利用率更高。",[978,2405,2406],{},"但它也带来新的复杂性：",[1278,2408,2409,2412,2415,2418,2421],{},[1281,2410,2411],{},"需要寄存器重命名；",[1281,2413,2414],{},"需要 ROB；",[1281,2416,2417],{},"需要恢复机制；",[1281,2419,2420],{},"需要处理精确异常；",[1281,2422,2423],{},"需要更复杂的调度逻辑。",[1307,2425],{},[1003,2427,2429],{"id":2428},"_4-分支预测","4. 分支预测",[978,2431,2432],{},[992,2433,2434],{},"Branch Prediction",[1013,2436,2438],{"id":2437},"_41-控制流惩罚","4.1 控制流惩罚",[978,2440,2441],{},"分支指令会决定程序接下来执行哪条路径。",[978,2443,2444],{},"但分支结果通常要到后面的执行阶段才知道。",[978,2446,2447],{},"在这之前，处理器有两个选择：",[1332,2449,2452],{"className":2450,"code":2451,"language":1337},[1335],"等待分支结果 → 流水线空转\n先猜一个方向 → 可能预测错误\n",[1339,2453,2451],{"__ignoreMap":1341},[978,2455,2456],{},"现代处理器流水线很深，如果预测错误，会浪费大量已经取指、解码甚至执行的指令。",[978,2458,2459],{},[1032,2460],{"alt":1032,"src":2461},"\u002Fimg\u002FComputerOrganization\u002FL13-14-ComplexPipeline-47.png",[1307,2463],{},[1013,2465,2467],{"id":2466},"_42-分支之间的平均运行长度","4.2 分支之间的平均运行长度",[978,2469,2470],{},"程序中分支指令出现频率很高。",[978,2472,2473],{},"例如整数程序中，大约每几条指令就会遇到一次分支。",[978,2475,2476],{},"这说明：",[1332,2478,2481],{"className":2479,"code":2480,"language":1337},[1335],"控制冒险不是偶发问题，而是高性能流水线的常见瓶颈。\n",[1339,2482,2480],{"__ignoreMap":1341},[978,2484,2485],{},"如果不能有效处理分支，前端取指会频繁中断。",[978,2487,2488],{},[1032,2489],{"alt":1032,"src":2490},"\u002Fimg\u002FComputerOrganization\u002FL13-14-ComplexPipeline-48.png",[1307,2492],{},[1013,2494,2496],{"id":2495},"_43-减少控制流惩罚的方法","4.3 减少控制流惩罚的方法",[978,2498,2499],{},"减少分支惩罚主要有软件和硬件两类方法。",[1151,2501,2502,2514],{},[1154,2503,2504],{},[1157,2505,2506,2509,2512],{},[1160,2507,2508],{},"方法",[1160,2510,2511],{},"例子",[1160,2513,1575],{},[1170,2515,2516,2527],{},[1157,2517,2518,2521,2524],{},[1175,2519,2520],{},"软件方法",[1175,2522,2523],{},"循环展开、指令调度",[1175,2525,2526],{},"减少分支数量或提前计算分支",[1157,2528,2529,2532,2535],{},[1175,2530,2531],{},"硬件方法",[1175,2533,2534],{},"延迟槽、分支预测、推测执行",[1175,2536,2537],{},"让流水线不停等",[978,2539,2540],{},"其中最重要、最常用的是：",[1332,2542,2545],{"className":2543,"code":2544,"language":1337},[1335],"分支预测 + 推测执行\n",[1339,2546,2544],{"__ignoreMap":1341},[978,2548,2549],{},[1032,2550],{"alt":1032,"src":2551},"\u002Fimg\u002FComputerOrganization\u002FL13-14-ComplexPipeline-49.png",[1307,2553],{},[1013,2555,2557],{"id":2556},"_44-分支预测的动机与硬件支持","4.4 分支预测的动机与硬件支持",[978,2559,2560],{},"分支预测的目标是：",[1332,2562,2565],{"className":2563,"code":2564,"language":1337},[1335],"在分支真正解析前，提前猜测下一条取指地址。\n",[1339,2566,2564],{"__ignoreMap":1341},[978,2568,2569],{},"如果预测正确，流水线几乎不断流。",[978,2571,2572],{},"如果预测错误，则清除错误路径并恢复正确 PC。",[978,2574,2575],{},"需要的硬件包括：",[1278,2577,2578,2581,2584,2587],{},[1281,2579,2580],{},"BHT：预测分支方向；",[1281,2582,2583],{},"BTB：预测分支目标地址；",[1281,2585,2586],{},"Return Stack：预测函数返回地址；",[1281,2588,2589],{},"Mispredict Recovery：错误预测恢复机制。",[978,2591,2592],{},[1032,2593],{"alt":1032,"src":2594},"\u002Fimg\u002FComputerOrganization\u002FL13-14-ComplexPipeline-50.png",[1307,2596],{},[1013,2598,2600],{"id":2599},"_45-分支预测的重要性","4.5 分支预测的重要性",[978,2602,2603],{},"分支预测准确率越高，浪费的指令越少。",[978,2605,2606],{},"例如从 90% 提升到 95%，看似只提高 5%，但错误预测次数减少了一半。",[978,2608,2609],{},"原因是：",[1332,2611,2614],{"className":2612,"code":2613,"language":1337},[1335],"错误率从 10% 降到 5%，mispredict 数量减少 50%。\n",[1339,2615,2613],{"__ignoreMap":1341},[978,2617,2618],{},"所以高性能处理器非常依赖高准确率分支预测器。",[978,2620,2621],{},[1032,2622],{"alt":1032,"src":2623},"\u002Fimg\u002FComputerOrganization\u002FL13-14-ComplexPipeline-51.png",[1307,2625],{},[1013,2627,2629],{"id":2628},"_46-静态分支预测","4.6 静态分支预测",[978,2631,2632],{},"静态预测不依赖运行时历史，而是使用固定规则。",[978,2634,2635],{},"常见规则：",[1278,2637,2638,2641,2644,2647,2650],{},[1281,2639,2640],{},"默认预测 taken；",[1281,2642,2643],{},"默认预测 not taken；",[1281,2645,2646],{},"向后分支预测 taken；",[1281,2648,2649],{},"向前分支预测 not taken；",[1281,2651,2652],{},"由 ISA 或编译器给出提示。",[978,2654,2655],{},"局限是：",[978,2657,2658],{},"它无法根据程序实际运行行为动态调整。",[978,2660,2661],{},[1032,2662],{"alt":1032,"src":2663},"\u002Fimg\u002FComputerOrganization\u002FL13-14-ComplexPipeline-52.png",[1307,2665],{},[1013,2667,2669],{"id":2668},"_47-动态分支预测","4.7 动态分支预测",[978,2671,2672],{},"动态预测根据过去行为预测未来行为。",[978,2674,2675],{},"主要利用两类相关性：",[1151,2677,2678,2687],{},[1154,2679,2680],{},[1157,2681,2682,2685],{},[1160,2683,2684],{},"相关性",[1160,2686,1165],{},[1170,2688,2689,2697],{},[1157,2690,2691,2694],{},[1175,2692,2693],{},"时间相关性",[1175,2695,2696],{},"同一个分支过去怎么走，下次大概率也类似",[1157,2698,2699,2702],{},[1175,2700,2701],{},"空间相关性",[1175,2703,2704],{},"不同分支之间可能存在相关关系",[978,2706,2707],{},"动态预测比静态预测更准确，是现代处理器的主流方法。",[978,2709,2710],{},[1032,2711],{"alt":1032,"src":2712},"\u002Fimg\u002FComputerOrganization\u002FL13-14-ComplexPipeline-53.png",[1307,2714],{},[1013,2716,2718],{"id":2717},"_48-一位与两位分支历史预测器","4.8 一位与两位分支历史预测器",[978,2720,2721],{},"一位预测器只记录上一次结果。",[978,2723,2724],{},"问题是循环分支容易错两次：",[1332,2726,2729],{"className":2727,"code":2728,"language":1337},[1335],"进入循环时可能错一次\n退出循环时又错一次\n",[1339,2730,2728],{"__ignoreMap":1341},[978,2732,2733],{},"两位预测器使用饱和计数器，需要连续两次预测错误才改变方向。",[978,2735,2736],{},"因此它更稳定，能减少循环边界处的错误预测。",[978,2738,2739],{},[1032,2740],{"alt":1032,"src":2741},"\u002Fimg\u002FComputerOrganization\u002FL13-14-ComplexPipeline-54.png",[978,2743,2744],{},[1032,2745],{"alt":1032,"src":2746},"\u002Fimg\u002FComputerOrganization\u002FL13-14-ComplexPipeline-55.png",[1307,2748],{},[1013,2750,2752],{"id":2751},"_49-bht-分支历史表","4.9 BHT 分支历史表",[978,2754,2755],{},"BHT，即 Branch History Table，用于记录分支历史方向。",[978,2757,2758],{},"基本过程：",[1332,2760,2763],{"className":2761,"code":2762,"language":1337},[1335],"用 PC 索引 BHT → 读出预测位 → 判断 taken \u002F not taken\n",[1339,2764,2762],{"__ignoreMap":1341},[978,2766,2767],{},"BHT 主要预测：",[1332,2769,2772],{"className":2770,"code":2771,"language":1337},[1335],"分支是否会跳转\n",[1339,2773,2771],{"__ignoreMap":1341},[978,2775,2776],{},"但它只给方向，不直接给目标地址。",[978,2778,2779],{},[1032,2780],{"alt":1032,"src":2781},"\u002Fimg\u002FComputerOrganization\u002FL13-14-ComplexPipeline-56.png",[978,2783,2784],{},[1032,2785],{"alt":1032,"src":2786},"\u002Fimg\u002FComputerOrganization\u002FL13-14-ComplexPipeline-57.png",[1307,2788],{},[1013,2790,2792],{"id":2791},"_410-两级分支预测器","4.10 两级分支预测器",[978,2794,2795],{},"两级预测器利用更长的历史信息。",[978,2797,2798],{},"基本思想：",[1332,2800,2803],{"className":2801,"code":2802,"language":1337},[1335],"先记录最近几个分支的历史\n再用历史模式选择对应的预测表项\n",[1339,2804,2802],{"__ignoreMap":1341},[978,2806,2807],{},"它可以捕捉多个分支之间的相关性。",[978,2809,2810],{},"例如：",[1332,2812,2815],{"className":2813,"code":2814,"language":1337},[1335],"if (x[i] \u003C 7)\nif (x[i] \u003C 5)\n",[1339,2816,2814],{"__ignoreMap":1341},[978,2818,2819],{},"第一个条件的结果可能帮助预测第二个条件。",[978,2821,2822],{},[1032,2823],{"alt":1032,"src":2824},"\u002Fimg\u002FComputerOrganization\u002FL13-14-ComplexPipeline-58.png",[978,2826,2827],{},[1032,2828],{"alt":1032,"src":2829},"\u002Fimg\u002FComputerOrganization\u002FL13-14-ComplexPipeline-59.png",[978,2831,2832],{},[1032,2833],{"alt":1032,"src":2834},"\u002Fimg\u002FComputerOrganization\u002FL13-14-ComplexPipeline-60.png",[1307,2836],{},[1013,2838,2840],{"id":2839},"_411-btb-分支目标缓冲区","4.11 BTB 分支目标缓冲区",[978,2842,2843],{},"BTB，即 Branch Target Buffer。",[978,2845,2846],{},"BHT 只能预测方向，BTB 可以预测目标地址。",[978,2848,2849],{},"基本作用是：",[1332,2851,2854],{"className":2852,"code":2853,"language":1337},[1335],"如果当前 PC 命中 BTB，就直接给出预测跳转目标。\n",[1339,2855,2853],{"__ignoreMap":1341},[978,2857,2858],{},"这样处理器不必等到分支解码或执行后才知道跳转地址。",[978,2860,2861],{},"BTB 对 taken branch 尤其重要。",[978,2863,2864],{},[1032,2865],{"alt":1032,"src":2866},"\u002Fimg\u002FComputerOrganization\u002FL13-14-ComplexPipeline-61.png",[1307,2868],{},[1013,2870,2872],{"id":2871},"_412-btb-与-bht-结合","4.12 BTB 与 BHT 结合",[978,2874,2875],{},"BTB 和 BHT 功能不同：",[1151,2877,2878,2887],{},[1154,2879,2880],{},[1157,2881,2882,2884],{},[1160,2883,1572],{},[1160,2885,2886],{},"主要作用",[1170,2888,2889,2897],{},[1157,2890,2891,2894],{},[1175,2892,2893],{},"BHT",[1175,2895,2896],{},"预测分支方向",[1157,2898,2899,2902],{},[1175,2900,2901],{},"BTB",[1175,2903,2904],{},"预测分支目标地址",[978,2906,2907],{},"BTB 更贵，容量通常较小，但能更早重定向取指。",[978,2909,2910],{},"BHT 更便宜，容量可以更大，方向预测更灵活。",[978,2912,2913],{},"现代处理器通常结合使用二者。",[978,2915,2916],{},[1032,2917],{"alt":1032,"src":2918},"\u002Fimg\u002FComputerOrganization\u002FL13-14-ComplexPipeline-62.png",[1307,2920],{},[1013,2922,2924],{"id":2923},"_413-跳转寄存器与返回栈","4.13 跳转寄存器与返回栈",[978,2926,2927],{},"有些跳转目标不是立即数，而是寄存器中的地址。",[978,2929,2930],{},"典型场景：",[1278,2932,2933,2936,2939],{},[1281,2934,2935],{},"switch 语句；",[1281,2937,2938],{},"动态函数调用；",[1281,2940,2941],{},"子程序返回。",[978,2943,2944],{},"其中函数返回比较特殊。",[978,2946,2947],{},"同一个函数可能从很多地方被调用，所以返回地址变化频繁。",[978,2949,2950,2951,2954],{},"因此处理器使用 ",[992,2952,2953],{},"Return Stack","：",[1332,2956,2959],{"className":2957,"code":2958,"language":1337},[1335],"函数调用时 push 返回地址\n函数返回时 pop 返回地址\n",[1339,2960,2958],{"__ignoreMap":1341},[978,2962,2963],{},"它通常比普通 BTB 更适合预测函数返回。",[978,2965,2966],{},[1032,2967],{"alt":1032,"src":2968},"\u002Fimg\u002FComputerOrganization\u002FL13-14-ComplexPipeline-63.png",[978,2970,2971],{},[1032,2972],{"alt":1032,"src":2973},"\u002Fimg\u002FComputerOrganization\u002FL13-14-ComplexPipeline-64.png",[978,2975,2976],{},[1032,2977],{"alt":1032,"src":2978},"\u002Fimg\u002FComputerOrganization\u002FL13-14-ComplexPipeline-65.png",[978,2980,2981],{},[1032,2982],{"alt":1032,"src":2983},"\u002Fimg\u002FComputerOrganization\u002FL13-14-ComplexPipeline-66.png",[1307,2985],{},[1013,2987,2989],{"id":2988},"_414-顺序与乱序机器中的分支预测","4.14 顺序与乱序机器中的分支预测",[978,2991,2992],{},"顺序处理器和乱序处理器都需要分支预测。",[978,2994,2995],{},"两者前端可以使用类似的预测器。",[978,2997,2998],{},"区别在于错误恢复：",[1151,3000,3001,3010],{},[1154,3002,3003],{},[1157,3004,3005,3007],{},[1160,3006,1162],{},[1160,3008,3009],{},"错误预测恢复",[1170,3011,3012,3020],{},[1157,3013,3014,3017],{},[1175,3015,3016],{},"顺序执行",[1175,3018,3019],{},"清除分支后的流水线指令",[1157,3021,3022,3025],{},[1175,3023,3024],{},"乱序执行",[1175,3026,3027],{},"还要恢复 ROB、Rename Table、推测状态",[978,3029,3030],{},"乱序机器中，分支后的指令可能已经执行完成，所以恢复机制更复杂。",[978,3032,3033],{},[1032,3034],{"alt":1032,"src":3035},"\u002Fimg\u002FComputerOrganization\u002FL13-14-ComplexPipeline-67.png",[1307,3037],{},[1013,3039,3041],{"id":3040},"_415-分支预测错误恢复","4.15 分支预测错误恢复",[978,3043,3044],{},"预测错误时，处理器需要：",[1278,3046,3047,3050,3053,3056,3059],{},[1281,3048,3049],{},"清除错误路径上的指令；",[1281,3051,3052],{},"恢复正确 PC；",[1281,3054,3055],{},"恢复 ROB 状态；",[1281,3057,3058],{},"恢复 Rename Table；",[1281,3060,3061],{},"重新从正确地址取指。",[978,3063,2069],{},[1332,3065,3068],{"className":3066,"code":3067,"language":1337},[1335],"预测正确 → 继续执行\n预测错误 → Kill 错误路径，恢复正确状态\n",[1339,3069,3067],{"__ignoreMap":1341},[978,3071,3072],{},"为了快速恢复，处理器可能在每个未解析分支处保存 Rename Table 快照。",[978,3074,3075],{},[1032,3076],{"alt":1032,"src":3077},"\u002Fimg\u002FComputerOrganization\u002FL13-14-ComplexPipeline-68.png",[978,3079,3080],{},[1032,3081],{"alt":1032,"src":3082},"\u002Fimg\u002FComputerOrganization\u002FL13-14-ComplexPipeline-69.png",[978,3084,3085],{},[1032,3086],{"alt":1032,"src":3087},"\u002Fimg\u002FComputerOrganization\u002FL13-14-ComplexPipeline-70.png",[978,3089,3090],{},[1032,3091],{"alt":1032,"src":3092},"\u002Fimg\u002FComputerOrganization\u002FL13-14-ComplexPipeline-71.png",[1307,3094],{},[1003,3096,3097],{"id":3097},"第四部分总结",[978,3099,3100],{},"分支预测的核心机制是：",[1332,3102,3105],{"className":3103,"code":3104,"language":1337},[1335],"提前预测分支方向和目标地址 → 沿预测路径继续取指执行 → 错了再恢复\n",[1339,3106,3104],{"__ignoreMap":1341},[978,3108,3109],{},"它的作用是：",[1278,3111,3112,3115,3118,3121],{},[1281,3113,3114],{},"减少控制冒险带来的流水线停顿；",[1281,3116,3117],{},"提高前端取指连续性；",[1281,3119,3120],{},"降低深流水线中的分支惩罚；",[1281,3122,3123],{},"支持 OoO 和超标量处理器持续供给指令。",[978,3125,3126],{},"它的代价是：",[1278,3128,3129,3132,3135,3138],{},[1281,3130,3131],{},"需要预测表结构；",[1281,3133,3134],{},"需要错误恢复机制；",[1281,3136,3137],{},"预测错误会浪费大量执行资源；",[1281,3139,3140],{},"OoO 中恢复逻辑更复杂。",[1307,3142],{},[1003,3144,3146],{"id":3145},"_5-统一物理寄存器文件","5. 统一物理寄存器文件",[978,3148,3149],{},[992,3150,3151],{},"Unified Physical Register File",[1013,3153,3155],{"id":3154},"_51-ooo-设计选择","5.1 OoO 设计选择",[978,3157,3158],{},"乱序处理器有多个实现选择，主要包括：",[1151,3160,3161,3171],{},[1154,3162,3163],{},[1157,3164,3165,3168],{},[1160,3166,3167],{},"问题",[1160,3169,3170],{},"选择",[1170,3172,3173,3181,3189],{},[1157,3174,3175,3178],{},[1175,3176,3177],{},"保留站放在哪里",[1175,3179,3180],{},"集中式 Issue Window 或分布式 Reservation Station",[1157,3182,3183,3186],{},[1175,3184,3185],{},"ROB 是否保存数据",[1175,3187,3188],{},"ROB 保存结果，或只保存状态信息",[1157,3190,3191,3194],{},[1175,3192,3193],{},"重命名如何实现",[1175,3195,3196],{},"ROB 标签重命名，或物理寄存器重命名",[978,3198,3199,3200],{},"统一物理寄存器文件属于后者：\n",[992,3201,3202],{},"数据主要放在物理寄存器文件中，而不是 ROB 中。",[978,3204,3205],{},[1032,3206],{"alt":1032,"src":3207},"\u002Fimg\u002FComputerOrganization\u002FL13-14-ComplexPipeline-72.png",[1307,3209],{},[1013,3211,3213],{"id":3212},"_52-统一物理寄存器文件思想","5.2 统一物理寄存器文件思想",[978,3215,3216],{},"UPRF 的核心思想是：",[1332,3218,3221],{"className":3219,"code":3220,"language":1337},[1335],"架构寄存器名 → 物理寄存器名\n",[1339,3222,3220],{"__ignoreMap":1341},[978,3224,2810],{},[1332,3226,3229],{"className":3227,"code":3228,"language":1337},[1335],"x1 → P8\nx3 → P7\nx6 → P5\n",[1339,3230,3228],{"__ignoreMap":1341},[978,3232,3233,3234,3237,3238,3241],{},"执行单元不再直接使用 ",[1339,3235,3236],{"code":3236},"x1、x2、x3"," 这类架构寄存器，而是使用 ",[1339,3239,3240],{"code":3240},"P0、P1、P2"," 这类物理寄存器。",[978,3243,3244],{},"这样做的好处是：",[1278,3246,3247,3250,3253,3256],{},[1281,3248,3249],{},"消除 WAR；",[1281,3251,3252],{},"消除 WAW；",[1281,3254,3255],{},"支持更多临时结果；",[1281,3257,3258],{},"减少 ROB 中的数据移动。",[978,3260,3261],{},[1032,3262],{"alt":1032,"src":3263},"\u002Fimg\u002FComputerOrganization\u002FL13-14-ComplexPipeline-73.png",[1307,3265],{},[1013,3267,3269],{"id":3268},"_53-物理寄存器生命周期","5.3 物理寄存器生命周期",[978,3271,3272],{},"物理寄存器文件同时保存两类值：",[1151,3274,3275,3283],{},[1154,3276,3277],{},[1157,3278,3279,3281],{},[1160,3280,1162],{},[1160,3282,1165],{},[1170,3284,3285,3293],{},[1157,3286,3287,3290],{},[1175,3288,3289],{},"Committed value",[1175,3291,3292],{},"已经提交的正确体系结构状态",[1157,3294,3295,3298],{},[1175,3296,3297],{},"Speculative value",[1175,3299,3300],{},"乱序执行产生的临时结果",[978,3302,3303],{},"物理寄存器不能在结果刚写完时立即释放。",[978,3305,3306],{},"它必须等到新的映射安全提交后，旧物理寄存器才可以回收。",[978,3308,3309],{},"核心规则：",[1332,3311,3314],{"className":3312,"code":3313,"language":1337},[1335],"当同一架构寄存器的新写入提交后，旧物理寄存器才能释放。\n",[1339,3315,3313],{"__ignoreMap":1341},[978,3317,3318],{},[1032,3319],{"alt":1032,"src":3320},"\u002Fimg\u002FComputerOrganization\u002FL13-14-ComplexPipeline-74.png",[1307,3322],{},[1013,3324,3326],{"id":3325},"_54-物理寄存器管理","5.4 物理寄存器管理",[978,3328,3329],{},"物理寄存器管理主要依靠三个结构：",[1151,3331,3332,3340],{},[1154,3333,3334],{},[1157,3335,3336,3338],{},[1160,3337,1572],{},[1160,3339,1575],{},[1170,3341,3342,3350,3358],{},[1157,3343,3344,3347],{},[1175,3345,3346],{},"Rename Table",[1175,3348,3349],{},"记录架构寄存器当前对应哪个物理寄存器",[1157,3351,3352,3355],{},[1175,3353,3354],{},"Free List",[1175,3356,3357],{},"记录哪些物理寄存器可分配",[1157,3359,3360,3363],{},[1175,3361,3362],{},"ROB",[1175,3364,3365],{},"记录指令顺序、提交状态和旧映射信息",[978,3367,3368],{},"重命名一条写寄存器指令时：",[1332,3370,3373],{"className":3371,"code":3372,"language":1337},[1335],"从 Free List 取一个新物理寄存器\n更新 Rename Table\n在 ROB 中记录旧物理寄存器\n",[1339,3374,3372],{"__ignoreMap":1341},[978,3376,3377],{},"ROB 中通常需要保存：",[1151,3379,3380,3388],{},[1154,3381,3382],{},[1157,3383,3384,3386],{},[1160,3385,1432],{},[1160,3387,1165],{},[1170,3389,3390,3398,3406],{},[1157,3391,3392,3395],{},[1175,3393,3394],{},"Rd",[1175,3396,3397],{},"架构目的寄存器",[1157,3399,3400,3403],{},[1175,3401,3402],{},"PRd",[1175,3404,3405],{},"新分配的物理寄存器",[1157,3407,3408,3411],{},[1175,3409,3410],{},"LPRd",[1175,3412,3413],{},"旧的物理寄存器",[978,3415,3416,3418],{},[1339,3417,3410],{"code":3410}," 的作用是：\n等新指令提交后，把旧物理寄存器释放。",[1151,3420,3421],{"style":1744},[1170,3422,3423],{},[1157,3424,1750,3425,1750,3432],{"style":1749},[1175,3426,3427,1750],{"style":1753},[978,3428,3429],{},[1032,3430],{"alt":1032,"src":3431},"\u002Fimg\u002FComputerOrganization\u002FL13-14-ComplexPipeline-75.png",[1175,3433,3434,1750],{"style":1761},[978,3435,3436],{},[1032,3437],{"alt":1032,"src":3438},"\u002Fimg\u002FComputerOrganization\u002FL13-14-ComplexPipeline-76.png",[1151,3440,3441],{"style":1744},[1170,3442,3443],{},[1157,3444,1750,3445,1750,3452],{"style":1749},[1175,3446,3447,1750],{"style":1753},[978,3448,3449],{},[1032,3450],{"alt":1032,"src":3451},"\u002Fimg\u002FComputerOrganization\u002FL13-14-ComplexPipeline-77.png",[1175,3453,3454,1750],{"style":1761},[978,3455,3456],{},[1032,3457],{"alt":1032,"src":3458},"\u002Fimg\u002FComputerOrganization\u002FL13-14-ComplexPipeline-78.png",[1151,3460,3461],{"style":1744},[1170,3462,3463],{},[1157,3464,1750,3465,1750,3472],{"style":1749},[1175,3466,3467,1750],{"style":1761},[978,3468,3469],{},[1032,3470],{"alt":1032,"src":3471},"\u002Fimg\u002FComputerOrganization\u002FL13-14-ComplexPipeline-79.png",[1175,3473,3474,1750],{"style":1753},[978,3475,3476],{},[1032,3477],{"alt":1032,"src":3478},"\u002Fimg\u002FComputerOrganization\u002FL13-14-ComplexPipeline-80.png",[978,3480,3481],{},[1032,3482],{"alt":1032,"src":3483},"\u002Fimg\u002FComputerOrganization\u002FL13-14-ComplexPipeline-81.png",[1307,3485],{},[1013,3487,3489],{"id":3488},"_55-提交时释放旧物理寄存器","5.5 提交时释放旧物理寄存器",[978,3491,3492],{},"假设原来：",[1332,3494,3497],{"className":3495,"code":3496,"language":1337},[1335],"x3 → P7\n",[1339,3498,3496],{"__ignoreMap":1341},[978,3500,3501,3502,3505],{},"现在有一条新指令写 ",[1339,3503,3504],{"code":3504},"x3","，重命名为：",[1332,3507,3510],{"className":3508,"code":3509,"language":1337},[1335],"x3 → P1\n",[1339,3511,3509],{"__ignoreMap":1341},[978,3513,3514],{},"此时：",[1278,3516,3517,3523,3529],{},[1281,3518,3519,3522],{},[1339,3520,3521],{"code":3521},"P1"," 是新值；",[1281,3524,3525,3528],{},[1339,3526,3527],{"code":3527},"P7"," 是旧值；",[1281,3530,3531,3533],{},[1339,3532,3527],{"code":3527}," 不能立刻释放。",[978,3535,3536,3537,3539,3540,3542],{},"只有当写 ",[1339,3538,3504],{"code":3504}," 的这条指令顺序提交后，说明新映射已经成为正式状态，",[1339,3541,3527],{"code":3527}," 才能回到 Free List。",[978,3544,1643],{},[1332,3546,3549],{"className":3547,"code":3548,"language":1337},[1335],"执行完成 ≠ 可以释放旧寄存器\n顺序提交后才可以释放旧寄存器\n",[1339,3550,3548],{"__ignoreMap":1341},[1307,3552],{},[1013,3554,3556],{"id":3555},"_56-异常时修复重命名状态","5.6 异常时修复重命名状态",[978,3558,3559],{},"如果发生异常或分支预测错误，需要恢复 Rename Table。",[978,3561,3562],{},"常见方法有两类：",[1151,3564,3565,3574],{},[1154,3566,3567],{},[1157,3568,3569,3571],{},[1160,3570,2508],{},[1160,3572,3573],{},"思路",[1170,3575,3576,3584],{},[1157,3577,3578,3581],{},[1175,3579,3580],{},"逆序恢复",[1175,3582,3583],{},"根据 ROB 中的 PRd \u002F LPRd 反向撤销重命名",[1157,3585,3586,3589],{},[1175,3587,3588],{},"快照恢复",[1175,3590,3591],{},"在分支处保存 Rename Table snapshot，错误时直接恢复",[978,3593,2810],{},[1278,3595,3596,3599],{},[1281,3597,3598],{},"MIPS R10K 使用旧映射信息修复 Rename Table；",[1281,3600,3601],{},"Alpha 21264 保存大量 Rename Table 快照，恢复更快。",[978,3603,3604],{},[1032,3605],{"alt":1032,"src":3606},"\u002Fimg\u002FComputerOrganization\u002FL13-14-ComplexPipeline-82.png",[1307,3608],{},[1013,3610,3612],{"id":3611},"_57-使用物理-regfile-的流水线设计","5.7 使用物理 Regfile 的流水线设计",[978,3614,3615],{},"使用 UPRF 后，流水线大致分为：",[1332,3617,3620],{"className":3618,"code":3619,"language":1337},[1335],"Fetch → Decode\u002FRename → Issue → Execute → Commit\n",[1339,3621,3619],{"__ignoreMap":1341},[978,3623,3624],{},"其中：",[1278,3626,3627,3630,3633,3636,3639],{},[1281,3628,3629],{},"Fetch：按预测 PC 取指；",[1281,3631,3632],{},"Decode\u002FRename：把架构寄存器转换成物理寄存器；",[1281,3634,3635],{},"Issue：选择源操作数已准备好的指令；",[1281,3637,3638],{},"Execute：功能单元读取 \u002F 写入物理寄存器；",[1281,3640,3641],{},"Commit：按顺序更新架构映射并释放旧寄存器。",[978,3643,3644],{},"关键点是：",[1332,3646,3649],{"className":3647,"code":3648,"language":1337},[1335],"执行可以乱序，提交仍然顺序。\n",[1339,3650,3648],{"__ignoreMap":1341},[978,3652,3653],{},[1032,3654],{"alt":1032,"src":3655},"\u002Fimg\u002FComputerOrganization\u002FL13-14-ComplexPipeline-83.png",[1307,3657],{},[1013,3659,3661],{"id":3660},"_58-超标量寄存器重命名","5.8 超标量寄存器重命名",[978,3663,3664],{},"超标量处理器每周期可能同时重命名多条指令。",[978,3666,3667],{},"这会带来一个额外问题：",[1332,3669,3672],{"className":3670,"code":3671,"language":1337},[1335],"同一周期内的指令之间也可能存在 RAW 依赖。\n",[1339,3673,3671],{"__ignoreMap":1341},[978,3675,2810],{},[1332,3677,3680],{"className":3678,"code":3679,"language":1337},[1335],"add x1, x2, x3\nsub x4, x1, x5\n",[1339,3681,3679],{"__ignoreMap":1341},[978,3683,3684],{},"如果这两条指令同周期重命名，第二条必须看到第一条刚刚产生的新物理寄存器映射。",[978,3686,3687],{},"因此，超标量重命名需要：",[1278,3689,3690,3693,3696,3699],{},[1281,3691,3692],{},"同时分配多个物理寄存器；",[1281,3694,3695],{},"检查同周期指令之间的依赖；",[1281,3697,3698],{},"保证后面指令使用最新映射；",[1281,3700,3701],{},"多端口读取 Rename Table 和 Free List。",[978,3703,3704],{},[1032,3705],{"alt":1032,"src":3706},"\u002Fimg\u002FComputerOrganization\u002FL13-14-ComplexPipeline-84.png",[978,3708,3709],{},[1032,3710],{"alt":1032,"src":3711},"\u002Fimg\u002FComputerOrganization\u002FL13-14-ComplexPipeline-85.png",[1307,3713],{},[1003,3715,3716],{"id":3716},"第五部分总结",[978,3718,3719],{},"统一物理寄存器文件的核心机制是：",[1332,3721,3724],{"className":3722,"code":3723,"language":1337},[1335],"架构寄存器重命名为物理寄存器\n物理寄存器保存提交值和推测值\nROB 负责顺序提交和旧寄存器释放\n",[1339,3725,3723],{"__ignoreMap":1341},[978,3727,3109],{},[1278,3729,3730,3733,3736,3739,3742],{},[1281,3731,3732],{},"消除 WAR \u002F WAW 名称依赖；",[1281,3734,3735],{},"支持更多乱序临时结果；",[1281,3737,3738],{},"减少 ROB 中的数据移动；",[1281,3740,3741],{},"提高乱序执行效率；",[1281,3743,3744],{},"适合超标量处理器。",[978,3746,3126],{},[1278,3748,3749,3752,3755,3758,3761],{},[1281,3750,3751],{},"需要 Rename Table；",[1281,3753,3754],{},"需要 Free List；",[1281,3756,3757],{},"需要更多物理寄存器；",[1281,3759,3760],{},"需要复杂的恢复机制；",[1281,3762,3763],{},"超标量重命名逻辑更复杂。",[1307,3765],{},[1003,3767,3769],{"id":3768},"_6-其他优化与注意事项","6. 其他优化与注意事项",[978,3771,3772],{},[992,3773,3774],{},"Additional Optimization Methods",[1013,3776,3778],{"id":3777},"_61-rob-与-issue-window-分离","6.1 ROB 与 Issue Window 分离",[978,3780,3781],{},"ROB 主要负责：",[1278,3783,3784,3787,3790],{},[1281,3785,3786],{},"保存指令顺序；",[1281,3788,3789],{},"支持顺序提交；",[1281,3791,3792],{},"保存异常信息。",[978,3794,3795],{},"Issue Window 主要负责：",[1278,3797,3798,3801,3804],{},[1281,3799,3800],{},"保存已解码、已重命名、但尚未发射的指令；",[1281,3802,3803],{},"等待操作数准备；",[1281,3805,3806],{},"选择可执行指令发射。",[978,3808,3809],{},"所以两者分工不同：",[1151,3811,3812,3820],{},[1154,3813,3814],{},[1157,3815,3816,3818],{},[1160,3817,1572],{},[1160,3819,1575],{},[1170,3821,3822,3829],{},[1157,3823,3824,3826],{},[1175,3825,3362],{},[1175,3827,3828],{},"保证顺序提交和精确异常",[1157,3830,3831,3834],{},[1175,3832,3833],{},"Issue Window",[1175,3835,3836],{},"负责乱序选择和发射",[978,3838,3839],{},"ROB 通常比 Issue Window 大，因为已发射但未提交的指令仍要留在 ROB 中。",[978,3841,3842],{},[1032,3843],{"alt":1032,"src":3844},"\u002Fimg\u002FComputerOrganization\u002FL13-14-ComplexPipeline-86.png",[1307,3846],{},[1013,3848,3850],{"id":3849},"_62-completion-与-commit-分离","6.2 Completion 与 Commit 分离",[978,3852,3853,3856,3857,3860],{},[992,3854,3855],{},"Completion"," 表示指令执行完成，结果已经算出。\n",[992,3858,3859],{},"Commit"," 表示结果正式更新体系结构状态。",[978,3862,3863],{},"二者不能混淆：",[1332,3865,3868],{"className":3866,"code":3867,"language":1337},[1335],"完成 ≠ 提交\n",[1339,3869,3867],{"__ignoreMap":1341},[978,3871,3872],{},"这样做的原因是：",[978,3874,3875],{},"乱序执行中，后面的指令可能先完成，但不能先提交，否则会破坏程序语义。",[978,3877,3878],{},[1032,3879],{"alt":1032,"src":3880},"\u002Fimg\u002FComputerOrganization\u002FL13-14-ComplexPipeline-87.png",[1307,3882],{},[1013,3884,3886],{"id":3885},"_63-rob-保存活动指令","6.3 ROB 保存活动指令",[978,3888,3889],{},"ROB 保存所有“已经进入流水线但还没有提交”的指令。",[978,3891,3892],{},"它像一个按程序顺序排列的队列：",[1332,3894,3897],{"className":3895,"code":3896,"language":1337},[1335],"较老指令 → 较新指令\nCommit 端 → Fetch 端\n",[1339,3898,3896],{"__ignoreMap":1341},[978,3900,3901],{},"ROB 的作用是：",[1278,3903,3904,3907,3910,3913],{},[1281,3905,3906],{},"跟踪指令是否完成；",[1281,3908,3909],{},"保存异常状态；",[1281,3911,3912],{},"保证提交顺序；",[1281,3914,3915],{},"支持错误恢复。",[978,3917,3918],{},[1032,3919],{"alt":1032,"src":3920},"\u002Fimg\u002FComputerOrganization\u002FL13-14-ComplexPipeline-88.png",[1307,3922],{},[1013,3924,3926],{"id":3925},"_64-发射时序与延迟预测","6.4 发射时序与延迟预测",[978,3928,3929],{},"有些指令可以根据已知延迟提前安排后续发射。",[978,3931,3932],{},"例如，如果知道上一条指令 1 个周期后会产生结果，下一条依赖指令可以提前准备。",[978,3934,3935],{},"但风险是：",[1332,3937,3940],{"className":3938,"code":3939,"language":1337},[1335],"如果实际延迟不符合预测，调度会失败。\n",[1339,3941,3939],{"__ignoreMap":1341},[978,3943,3944],{},"所以延迟可分为三类：",[1151,3946,3947,3956],{},[1154,3948,3949],{},[1157,3950,3951,3953],{},[1160,3952,1162],{},[1160,3954,3955],{},"处理方式",[1170,3957,3958,3966,3974],{},[1157,3959,3960,3963],{},[1175,3961,3962],{},"固定延迟",[1175,3964,3965],{},"可直接预测",[1157,3967,3968,3971],{},[1175,3969,3970],{},"预测延迟",[1175,3972,3973],{},"先推测，错了恢复",[1157,3975,3976,3979],{},[1175,3977,3978],{},"可变延迟",[1175,3980,3981],{},"等完成信号",[978,3983,3984],{},[1032,3985],{"alt":1032,"src":3986},"\u002Fimg\u002FComputerOrganization\u002FL13-14-ComplexPipeline-89.png",[978,3988,3989],{},[1032,3990],{"alt":1032,"src":3991},"\u002Fimg\u002FComputerOrganization\u002FL13-14-ComplexPipeline-90.png",[1307,3993],{},[1013,3995,3997],{"id":3996},"_65-改进指令获取","6.5 改进指令获取",[978,3999,4000],{},"乱序处理器后端很强，但前端可能供不上指令。",[978,4002,2609],{},[1278,4004,4005,4008,4011,4014],{},[1281,4006,4007],{},"OoO 需要大量指令填满窗口；",[1281,4009,4010],{},"推测执行会取很多最终不提交的指令；",[1281,4012,4013],{},"分支预测错误会清空窗口；",[1281,4015,4016],{},"taken branch 会打断连续取指。",[978,4018,4019],{},"所以高性能 OoO 处理器必须优化 instruction fetch。",[978,4021,4022],{},[1032,4023],{"alt":1032,"src":4024},"\u002Fimg\u002FComputerOrganization\u002FL13-14-ComplexPipeline-91.png",[1307,4026],{},[1013,4028,4030],{"id":4029},"_66-提高-taken-branch-带宽","6.6 提高 taken branch 带宽",[978,4032,4033],{},"taken branch 会让 PC 跳到不连续位置，影响取指连续性。",[978,4035,4036],{},"优化目标是：",[1332,4038,4041],{"className":4039,"code":4040,"language":1337},[1335],"尽早预测 taken branch，并尽快取到目标地址的指令。\n",[1339,4042,4040],{"__ignoreMap":1341},[978,4044,4045],{},"例如 Alpha 21264 通过 I-Cache、BTB、预测机制结合，提高 taken branch 的前端带宽。",[978,4047,4048],{},[1032,4049],{"alt":1032,"src":4050},"\u002Fimg\u002FComputerOrganization\u002FL13-14-ComplexPipeline-92.png",[978,4052,4053],{},[1032,4054],{"alt":1032,"src":4055},"\u002Fimg\u002FComputerOrganization\u002FL13-14-ComplexPipeline-93.png",[978,4057,4058],{},[1032,4059],{"alt":1032,"src":4060},"\u002Fimg\u002FComputerOrganization\u002FL13-14-ComplexPipeline-94.png",[1307,4062],{},[1013,4064,4066],{"id":4065},"_67-branch-address-cache","6.7 Branch Address Cache",[978,4068,4069],{},"Branch Address Cache 可以看作扩展版 BTB。",[978,4071,4072],{},"普通 BTB 每次通常预测一个目标。",[978,4074,4075],{},"Branch Address Cache 试图每周期返回多个分支预测结果。",[978,4077,4078],{},"目的：",[1332,4080,4083],{"className":4081,"code":4082,"language":1337},[1335],"支持每周期获取多个不连续基本块。\n",[1339,4084,4082],{"__ignoreMap":1341},[978,4086,4087],{},"这对宽发射超标量处理器很重要。",[978,4089,4090],{},[1032,4091],{"alt":1032,"src":4092},"\u002Fimg\u002FComputerOrganization\u002FL13-14-ComplexPipeline-95.png",[1307,4094],{},[1013,4096,4098],{"id":4097},"_68-获取多个基本块","6.8 获取多个基本块",[978,4100,4101],{},"如果每周期要取多条指令，只取一个基本块可能不够。",[978,4103,4104],{},"解决思路是同时取多个基本块，但会带来问题：",[1278,4106,4107,4110,4113,4116],{},[1281,4108,4109],{},"多端口 cache 成本高；",[1281,4111,4112],{},"cache 交错可能产生 bank conflict；",[1281,4114,4115],{},"合并多个基本块会增加延迟；",[1281,4117,4118],{},"错误预测代价更大。",[978,4120,4121],{},"所以这是一种性能和复杂度的权衡。",[978,4123,4124],{},[1032,4125],{"alt":1032,"src":4126},"\u002Fimg\u002FComputerOrganization\u002FL13-14-ComplexPipeline-96.png",[1307,4128],{},[1013,4130,4132],{"id":4131},"_69-trace-cache","6.9 Trace Cache",[978,4134,4135],{},"Trace Cache 的核心思想是：",[1332,4137,4140],{"className":4138,"code":4139,"language":1337},[1335],"把多个不连续的基本块打包成连续的 trace。\n",[1339,4141,4139],{"__ignoreMap":1341},[978,4143,4144],{},"这样一次取指就可以拿到跨越多个分支的指令序列。",[978,4146,4147],{},"优点：",[1278,4149,4150,4153],{},[1281,4151,4152],{},"提高前端供给能力；",[1281,4154,4155],{},"减少 taken branch 对取指的影响。",[978,4157,4158],{},"代价：",[1278,4160,4161,4164,4167],{},[1281,4162,4163],{},"结构复杂；",[1281,4165,4166],{},"需要根据分支预测路径组织 trace；",[1281,4168,4169],{},"预测错误时浪费较大。",[978,4171,4172],{},[1032,4173],{"alt":1032,"src":4174},"\u002Fimg\u002FComputerOrganization\u002FL13-14-ComplexPipeline-97.png",[1307,4176],{},[1013,4178,4180],{"id":4179},"_610-load-store-queue-设计","6.10 Load-Store Queue 设计",[978,4182,4183],{},"控制冒险之后，内存依赖是超标量处理器的重要瓶颈。",[978,4185,4186],{},"问题是：",[1332,4188,4191],{"className":4189,"code":4190,"language":1337},[1335],"sd x1, (x2)\nld x3, (x4)\n",[1339,4192,4190],{"__ignoreMap":1341},[978,4194,4195],{},"Load 能否先执行，取决于它和前面的 Store 是否访问同一地址。",[978,4197,4198],{},"因此需要 Load-Store Queue 处理：",[1278,4200,4201,4204,4207,4210,4213],{},[1281,4202,4203],{},"Load \u002F Store 顺序；",[1281,4205,4206],{},"地址比较；",[1281,4208,4209],{},"Store-to-Load 转发；",[1281,4211,4212],{},"地址推测；",[1281,4214,4215],{},"错误恢复。",[978,4217,4218],{},[1032,4219],{"alt":1032,"src":4220},"\u002Fimg\u002FComputerOrganization\u002FL13-14-ComplexPipeline-98.png",[1307,4222],{},[1013,4224,4226],{"id":4225},"_611-推测存储缓冲区","6.11 推测存储缓冲区",[978,4228,4229],{},"Store 指令不能在提交前直接修改内存。",[978,4231,2609],{},[978,4233,4234],{},"如果这条 Store 后来被取消，内存状态就无法恢复。",[978,4236,4237],{},"所以 Store 结果先进入 Speculative Store Buffer。",[978,4239,4240],{},"Store 通常拆成两部分：",[1151,4242,4243,4252],{},[1154,4244,4245],{},[1157,4246,4247,4250],{},[1160,4248,4249],{},"部分",[1160,4251,1575],{},[1170,4253,4254,4262],{},[1157,4255,4256,4259],{},[1175,4257,4258],{},"Store Address",[1175,4260,4261],{},"计算写入地址",[1157,4263,4264,4267],{},[1175,4265,4266],{},"Store Data",[1175,4268,4269],{},"准备写入数据",[978,4271,4272],{},"只有到提交点，Store 才能真正写入 D-Cache。",[978,4274,4275],{},"、",[978,4277,4278],{},[1032,4279],{"alt":1032,"src":4280},"\u002Fimg\u002FComputerOrganization\u002FL13-14-ComplexPipeline-99.png",[1307,4282],{},[1013,4284,4286],{"id":4285},"_612-load-bypass","6.12 Load bypass",[978,4288,4289],{},"如果 Load 要读取的数据已经在 Store Buffer 中，就不必再从 Cache 读取。",[978,4291,4292],{},"规则是：",[1332,4294,4297],{"className":4295,"code":4296,"language":1337},[1335],"如果 Store Buffer 和 Cache 都有数据，优先使用 Store Buffer。\n",[1339,4298,4296],{"__ignoreMap":1341},[978,4300,4301],{},"如果同一地址有多个较早 Store，则应该使用：",[1332,4303,4306],{"className":4304,"code":4305,"language":1337},[1335],"距离该 Load 最近的较早 Store。\n",[1339,4307,4305],{"__ignoreMap":1341},[978,4309,4310],{},"这就是 Store-to-Load forwarding。",[978,4312,4313],{},[1032,4314],{"alt":1032,"src":4315},"\u002Fimg\u002FComputerOrganization\u002FL13-14-ComplexPipeline-100.png",[1307,4317],{},[1013,4319,4321],{"id":4320},"_613-内存依赖与地址推测","6.13 内存依赖与地址推测",[978,4323,4324],{},"Load 是否能越过 Store，关键看地址是否冲突。",[978,4326,4327],{},"保守做法：",[1332,4329,4332],{"className":4330,"code":4331,"language":1337},[1335],"如果前面 Store 地址未知，Load 不执行。\n",[1339,4333,4331],{"__ignoreMap":1341},[978,4335,4336],{},"激进做法：",[1332,4338,4341],{"className":4339,"code":4340,"language":1337},[1335],"猜测 Load 和 Store 地址不同，先执行 Load。\n",[1339,4342,4340],{"__ignoreMap":1341},[978,4344,4345],{},"如果猜错，必须清除 Load 及其后续指令，代价很大。",[978,4347,4348],{},[1032,4349],{"alt":1032,"src":4350},"\u002Fimg\u002FComputerOrganization\u002FL13-14-ComplexPipeline-101.png",[978,4352,4353],{},[1032,4354],{"alt":1032,"src":4355},"\u002Fimg\u002FComputerOrganization\u002FL13-14-ComplexPipeline-102.png",[978,4357,4358],{},[1032,4359],{"alt":1032,"src":4360},"\u002Fimg\u002FComputerOrganization\u002FL13-14-ComplexPipeline-103.png",[978,4362,4363],{},[1032,4364],{"alt":1032,"src":4365},"\u002Fimg\u002FComputerOrganization\u002FL13-14-ComplexPipeline-104.png",[1307,4367],{},[1013,4369,4371],{"id":4370},"_614-内存依赖预测","6.14 内存依赖预测",[978,4373,4374],{},"内存依赖预测用于判断某个 Load 是否应该等待前面的 Store。",[978,4376,4377],{},"如果某条 Load 曾经和前面的 Store 冲突，就可以给它标记：",[1332,4379,4382],{"className":4380,"code":4381,"language":1337},[1335],"store-wait\n",[1339,4383,4381],{"__ignoreMap":1341},[978,4385,4386],{},"下次执行时，这条 Load 会等待较早 Store 完成后再执行。",[978,4388,4389],{},"这样可以减少地址推测错误带来的代价。",[978,4391,4392],{},[1032,4393],{"alt":1032,"src":4394},"\u002Fimg\u002FComputerOrganization\u002FL13-14-ComplexPipeline-105.png",[1307,4396],{},[1013,4398,4400],{"id":4399},"_615-uprf-流水线中的指令流","6.15 UPRF 流水线中的指令流",[978,4402,4403],{},"使用统一物理寄存器文件后，指令大致经过：",[1332,4405,4407],{"className":4406,"code":3619,"language":1337},[1335],[1339,4408,3619],{"__ignoreMap":1341},[978,4410,4411],{},"各阶段作用：",[1151,4413,4414,4423],{},[1154,4415,4416],{},[1157,4417,4418,4421],{},[1160,4419,4420],{},"阶段",[1160,4422,1575],{},[1170,4424,4425,4433,4441,4449,4457],{},[1157,4426,4427,4430],{},[1175,4428,4429],{},"Fetch",[1175,4431,4432],{},"根据 PC 和分支预测取指",[1157,4434,4435,4438],{},[1175,4436,4437],{},"Decode\u002FRename",[1175,4439,4440],{},"分配 ROB、Issue Window、物理寄存器",[1157,4442,4443,4446],{},[1175,4444,4445],{},"Issue",[1175,4447,4448],{},"选择操作数准备好的指令",[1157,4450,4451,4454],{},[1175,4452,4453],{},"Execute",[1175,4455,4456],{},"执行并写回物理寄存器",[1157,4458,4459,4461],{},[1175,4460,3859],{},[1175,4462,4463],{},"按程序顺序提交",[978,4465,4466],{},"核心仍然是：",[1332,4468,4471],{"className":4469,"code":4470,"language":1337},[1335],"前端顺序，执行乱序，提交顺序。\n",[1339,4472,4470],{"__ignoreMap":1341},[978,4474,4475],{},[1032,4476],{"alt":1032,"src":4477},"\u002Fimg\u002FComputerOrganization\u002FL13-14-ComplexPipeline-106.png",[978,4479,4480],{},[1032,4481],{"alt":1032,"src":4482},"\u002Fimg\u002FComputerOrganization\u002FL13-14-ComplexPipeline-107.png",[1307,4484],{},[1013,4486,4488],{"id":4487},"_616-顺序阶段与乱序阶段对比","6.16 顺序阶段与乱序阶段对比",[978,4490,4491],{},"不同阶段的顺序性不同。",[978,4493,4494],{},[1032,4495],{"alt":1032,"src":4496},"\u002Fimg\u002FComputerOrganization\u002FL13-14-ComplexPipeline-108.png",[978,4498,4499],{},[1032,4500],{"alt":1032,"src":4501},"\u002Fimg\u002FComputerOrganization\u002FL13-14-ComplexPipeline-109.png",[978,4503,4504],{},[1032,4505],{"alt":1032,"src":4506},"\u002Fimg\u002FComputerOrganization\u002FL13-14-ComplexPipeline-110.png",[1151,4508,4509,4518],{},[1154,4510,4511],{},[1157,4512,4513,4515],{},[1160,4514,4420],{},[1160,4516,4517],{},"顺序性",[1170,4519,4520,4527,4535,4542,4549,4556,4562,4569],{},[1157,4521,4522,4524],{},[1175,4523,4429],{},[1175,4525,4526],{},"顺序 \u002F 推测顺序",[1157,4528,4529,4532],{},[1175,4530,4531],{},"Decode",[1175,4533,4534],{},"顺序",[1157,4536,4537,4540],{},[1175,4538,4539],{},"Rename",[1175,4541,4534],{},[1157,4543,4544,4547],{},[1175,4545,4546],{},"Dispatch",[1175,4548,4534],{},[1157,4550,4551,4553],{},[1175,4552,4445],{},[1175,4554,4555],{},"可乱序",[1157,4557,4558,4560],{},[1175,4559,4453],{},[1175,4561,4555],{},[1157,4563,4564,4566],{},[1175,4565,3855],{},[1175,4567,4568],{},"通常乱序",[1157,4570,4571,4573],{},[1175,4572,3859],{},[1175,4574,4575],{},"通常顺序",[978,4577,4578],{},"其中最关键的是：",[1332,4580,4583],{"className":4581,"code":4582,"language":1337},[1335],"Issue \u002F Execute 可以乱序；\nCommit 必须顺序。\n",[1339,4584,4582],{"__ignoreMap":1341},[978,4586,4587],{},"这样既能提高性能，又能支持精确异常。",[1307,4589],{},[1013,4591,4593],{"id":4592},"_617-顺序提交与乱序提交","6.17 顺序提交与乱序提交",[978,4595,4596],{},"现代处理器通常使用顺序提交。",[978,4598,4599],{},"原因是顺序提交可以支持：",[1278,4601,4602,4605,4608],{},[1281,4603,4604],{},"精确异常；",[1281,4606,4607],{},"正确恢复；",[1281,4609,4610],{},"程序语义一致。",[978,4612,4613],{},"早期一些 OoO 机器采用乱序提交，但会产生 imprecise traps。",[978,4615,4616],{},"所以现在主流设计是：",[1332,4618,4621],{"className":4619,"code":4620,"language":1337},[1335],"乱序执行 + 顺序提交\n",[1339,4622,4620],{"__ignoreMap":1341},[978,4624,4625],{},[1032,4626],{"alt":1032,"src":4627},"\u002Fimg\u002FComputerOrganization\u002FL13-14-ComplexPipeline-111.png",[978,4629,4630],{},[1032,4631],{"alt":1032,"src":4632},"\u002Fimg\u002FComputerOrganization\u002FL13-14-ComplexPipeline-112.png",[978,4634,4635],{},[1032,4636],{"alt":1032,"src":4637},"\u002Fimg\u002FComputerOrganization\u002FL13-14-ComplexPipeline-113.png",[1307,4639],{},[1003,4641,4642],{"id":4642},"第六部分总结",[978,4644,4645,4646],{},"第六部分主要是在讲：\n",[992,4647,4648],{},"一个真正高性能的 OoO 处理器，不能只靠寄存器重命名和 ROB，还要优化前端取指、发射队列、访存队列和提交机制。",[978,4650,4651],{},"核心机制可以概括为：",[1332,4653,4656],{"className":4654,"code":4655,"language":1337},[1335],"ROB 保证顺序提交\nIssue Window 提供乱序发射\nBranch\u002FTrace 结构提高取指带宽\nLoad-Store Queue 处理内存依赖\n物理寄存器文件保存乱序结果\n",[1339,4657,4655],{"__ignoreMap":1341},[1307,4659],{},[1003,4661,4663],{"id":4662},"_7-伯克利-boom","7. 伯克利 BOOM",[978,4665,4666],{},[992,4667,4668],{},"Berkeley BOOM",[1013,4670,4672],{"id":4671},"_71-开源-berkeley-risc-v-处理器体系","7.1 开源 Berkeley RISC-V 处理器体系",[978,4674,4675],{},"Berkeley 的 RISC-V 处理器包括多个层次：",[1151,4677,4678,4688],{},[1154,4679,4680],{},[1157,4681,4682,4685],{},[1160,4683,4684],{},"处理器",[1160,4686,4687],{},"特点",[1170,4689,4690,4698,4706,4714],{},[1157,4691,4692,4695],{},[1175,4693,4694],{},"Sodor",[1175,4696,4697],{},"教学用，简单，不可综合",[1157,4699,4700,4703],{},[1175,4701,4702],{},"Z-scale",[1175,4704,4705],{},"RV32IM，微控制器",[1157,4707,4708,4711],{},[1175,4709,4710],{},"Rocket",[1175,4712,4713],{},"RV64G，顺序单发射处理器",[1157,4715,4716,4719],{},[1175,4717,4718],{},"BOOM",[1175,4720,4721],{},"RV64G，乱序超标量处理器",[978,4723,4724],{},"BOOM 是其中面向高性能 OoO 研究的平台。",[978,4726,4727],{},[1032,4728],{"alt":1032,"src":4729},"\u002Fimg\u002FComputerOrganization\u002FL13-14-ComplexPipeline-114.png",[1307,4731],{},[1013,4733,4735],{"id":4734},"_72-什么是-boom","7.2 什么是 BOOM",[978,4737,4738],{},"BOOM 是一个：",[1278,4740,4741,4744,4747,4750,4753,4756],{},[1281,4742,4743],{},"RISC-V 处理器；",[1281,4745,4746],{},"超标量处理器；",[1281,4748,4749],{},"乱序处理器；",[1281,4751,4752],{},"可综合处理器；",[1281,4754,4755],{},"可参数化处理器；",[1281,4757,4758],{},"开源处理器。",[978,4760,2069],{},[1332,4762,4765],{"className":4763,"code":4764,"language":1337},[1335],"BOOM = 开源的 RISC-V OoO Superscalar Processor\n",[1339,4766,4764],{"__ignoreMap":1341},[978,4768,4769],{},"它的作用不是只做教学演示，而是作为真实架构研究平台。",[978,4771,4772],{},[1032,4773],{"alt":1032,"src":4774},"\u002Fimg\u002FComputerOrganization\u002FL13-14-ComplexPipeline-115.png",[1307,4776],{},[1013,4778,4780],{"id":4779},"_73-chisel","7.3 Chisel",[978,4782,4783],{},"BOOM 使用 Chisel 编写。",[978,4785,4786],{},"Chisel 是嵌入在 Scala 中的硬件构造语言。",[978,4788,4789],{},"它的特点是：",[1278,4791,4792,4795,4798,4801,4804],{},[1281,4793,4794],{},"不是传统高级综合；",[1281,4796,4797],{},"用 Scala 数据结构描述硬件；",[1281,4799,4800],{},"支持面向对象和函数式编程；",[1281,4802,4803],{},"可以生成 Verilog；",[1281,4805,4806],{},"使用 FIRRTL 作为中间表示。",[978,4808,4809],{},"核心意义是：",[1332,4811,4814],{"className":4812,"code":4813,"language":1337},[1335],"Chisel 让 BOOM 不只是一个固定处理器，而是一个可生成、可配置的处理器设计。\n",[1339,4815,4813],{"__ignoreMap":1341},[978,4817,4818],{},[1032,4819],{"alt":1032,"src":4820},"\u002Fimg\u002FComputerOrganization\u002FL13-14-ComplexPipeline-116.png",[1307,4822],{},[1013,4824,4826],{"id":4825},"_74-boom-pipeline","7.4 BOOM Pipeline",[978,4828,4829],{},"BOOM 的流水线可以分成两部分：",[1332,4831,4834],{"className":4832,"code":4833,"language":1337},[1335],"前半部分：顺序\n后半部分：乱序\n",[1339,4835,4833],{"__ignoreMap":1341},[978,4837,4838],{},"大致流程是：",[1332,4840,4843],{"className":4841,"code":4842,"language":1337},[1335],"Fetch → Decode\u002FRename → Issue Window → Functional Units → Commit\n",[1339,4844,4842],{"__ignoreMap":1341},[978,4846,4847],{},"其中关键结构包括：",[1278,4849,4850,4853,4856,4859,4861,4864],{},[1281,4851,4852],{},"Rename Map Table；",[1281,4854,4855],{},"Free List；",[1281,4857,4858],{},"Issue Window；",[1281,4860,2341],{},[1281,4862,4863],{},"Unified Physical Register File；",[1281,4865,4866],{},"Functional Units。",[978,4868,4869],{},"这和前面课程主线一致：",[1332,4871,4874],{"className":4872,"code":4873,"language":1337},[1335],"前端顺序取指和重命名\n后端乱序发射和执行\n最后顺序提交\n",[1339,4875,4873],{"__ignoreMap":1341},[978,4877,4878],{},[1032,4879],{"alt":1032,"src":4880},"\u002Fimg\u002FComputerOrganization\u002FL13-14-ComplexPipeline-117.png",[978,4882,4883],{},[1032,4884],{"alt":1032,"src":4885},"\u002Fimg\u002FComputerOrganization\u002FL13-14-ComplexPipeline-118.png",[1307,4887],{},[1013,4889,4891],{"id":4890},"_75-参数化超标量处理器","7.5 参数化超标量处理器",[978,4893,4894],{},"BOOM 可以通过参数改变处理器结构，例如：",[1278,4896,4897,4900,4903,4906,4909,4912,4915],{},[1281,4898,4899],{},"发射宽度；",[1281,4901,4902],{},"ALU 数量；",[1281,4904,4905],{},"是否有 FPU；",[1281,4907,4908],{},"是否有乘除法单元；",[1281,4910,4911],{},"是否有 Load \u002F Store Unit；",[1281,4913,4914],{},"bypass 网络；",[1281,4916,4917],{},"寄存器读写端口数量。",[978,4919,4920],{},"所以 BOOM 不是单一固定架构，而是可以生成不同规模的 OoO 处理器。",[978,4922,4923],{},"例如可以配置成：",[1332,4925,4928],{"className":4926,"code":4927,"language":1337},[1335],"dual-issue\nquad-issue\n不同数量的执行单元\n不同规模的寄存器文件\n",[1339,4929,4927],{"__ignoreMap":1341},[978,4931,4932],{},[1032,4933],{"alt":1032,"src":4934},"\u002Fimg\u002FComputerOrganization\u002FL13-14-ComplexPipeline-119.png",[978,4936,4937],{},[1032,4938],{"alt":1032,"src":4939},"\u002Fimg\u002FComputerOrganization\u002FL13-14-ComplexPipeline-120.png",[978,4941,4942],{},[1032,4943],{"alt":1032,"src":4944},"\u002Fimg\u002FComputerOrganization\u002FL13-14-ComplexPipeline-121.png",[1307,4946],{},[1013,4948,4950],{"id":4949},"_76-功能单元设计","7.6 功能单元设计",[978,4952,4953],{},"BOOM 把功能单元抽象出来。",[978,4955,4956],{},"功能单元可以是：",[1151,4958,4959,4967],{},[1154,4960,4961],{},[1157,4962,4963,4965],{},[1160,4964,1162],{},[1160,4966,2511],{},[1170,4968,4969,4977,4985,4993],{},[1157,4970,4971,4974],{},[1175,4972,4973],{},"流水线单元",[1175,4975,4976],{},"ALU、FPU",[1157,4978,4979,4982],{},[1175,4980,4981],{},"非流水线单元",[1175,4983,4984],{},"除法器、部分长延迟单元",[1157,4986,4987,4990],{},[1175,4988,4989],{},"访存单元",[1175,4991,4992],{},"LSU \u002F MemAddrCalc",[1157,4994,4995,4998],{},[1175,4996,4997],{},"分支相关单元",[1175,4999,5000],{},"Branch Unit",[978,5002,5003],{},"抽象功能单元负责统一处理：",[1278,5005,5006,5009,5012,5015,5018],{},[1281,5007,5008],{},"输入输出接口；",[1281,5010,5011],{},"流水线 \u002F 非流水线差异；",[1281,5013,5014],{},"分支解析；",[1281,5016,5017],{},"branch kill；",[1281,5019,5020],{},"存储元数据。",[978,5022,5023],{},"这样不同功能单元可以更方便地接入 OoO 框架。",[1307,5025],{},[1013,5027,5029],{"id":5028},"_77-可综合与面积-性能结果","7.7 可综合与面积 \u002F 性能结果",[978,5031,5032],{},"BOOM 是可综合的，可以用于：",[1278,5034,5035,5038,5041,5044],{},[1281,5036,5037],{},"ASIC；",[1281,5039,5040],{},"FPGA；",[1281,5042,5043],{},"架构研究；",[1281,5045,5046],{},"性能与面积评估。",[978,5048,5049],{},"课件中展示了 BOOM 与 ARM Cortex-A9 的比较。重点不是记具体数字，而是说明：",[1332,5051,5054],{"className":5052,"code":5053,"language":1337},[1335],"BOOM 作为开源 OoO RISC-V 处理器，已经可以进行接近真实芯片级别的面积和性能评估。\n",[1339,5055,5053],{"__ignoreMap":1341},[978,5057,5058],{},"这说明 BOOM 不只是模拟器，而是有实际硬件实现价值。、",[978,5060,5061],{},[1032,5062],{"alt":1032,"src":5063},"\u002Fimg\u002FComputerOrganization\u002FL13-14-ComplexPipeline-122.png",[978,5065,5066],{},[1032,5067],{"alt":1032,"src":5068},"\u002Fimg\u002FComputerOrganization\u002FL13-14-ComplexPipeline-123.png",[978,5070,5071],{},[1032,5072],{"alt":1032,"src":5073},"\u002Fimg\u002FComputerOrganization\u002FL13-14-ComplexPipeline-124.png",[1307,5075],{},[1013,5077,5079],{"id":5078},"_78-load-store-unit","7.8 Load \u002F Store Unit",[978,5081,5082],{},[1032,5083],{"alt":1032,"src":5084},"\u002Fimg\u002FComputerOrganization\u002FL13-14-ComplexPipeline-125.png",[978,5086,5087],{},"BOOM 的 LSU 负责处理内存指令。",[978,5089,5090],{},"它需要解决：",[1278,5092,5093,5096,5099,5102,5105,5108,5111,5114,5117],{},[1281,5094,5095],{},"Load 地址计算；",[1281,5097,5098],{},"Store 地址计算；",[1281,5100,5101],{},"Store 数据保存；",[1281,5103,5104],{},"Store-to-Load forwarding；",[1281,5106,5107],{},"地址冲突检测；",[1281,5109,5110],{},"TLB miss；",[1281,5112,5113],{},"page fault；",[1281,5115,5116],{},"load retry；",[1281,5118,5119],{},"branch kill。",[978,5121,5122],{},"LSU 的核心问题是：",[1332,5124,5127],{"className":5125,"code":5126,"language":1337},[1335],"Load 能不能越过前面的 Store 执行？\n",[1339,5128,5126],{"__ignoreMap":1341},[978,5130,5131],{},"如果地址不冲突，可以提高性能；",[978,5133,5134],{},"如果判断错误，就需要回滚或重试。",[978,5136,5137],{},"所以 LSU 是 OoO 处理器中最复杂的部分之一。",[1307,5139],{},[1013,5141,5143],{"id":5142},"_79-repositories-与-quick-start","7.9 Repositories 与 Quick Start",[978,5145,5146],{},[1032,5147],{"alt":1032,"src":5148},"\u002Fimg\u002FComputerOrganization\u002FL13-14-ComplexPipeline-126.png",[978,5150,5151],{},"课件给出了 BOOM 和 Rocket-chip 的代码组织：",[1151,5153,5154,5163],{},[1154,5155,5156],{},[1157,5157,5158,5161],{},[1160,5159,5160],{},"仓库",[1160,5162,1575],{},[1170,5164,5165,5173,5181],{},[1157,5166,5167,5170],{},[1175,5168,5169],{},"riscv-boom",[1175,5171,5172],{},"BOOM core 本身",[1157,5174,5175,5178],{},[1175,5176,5177],{},"rocket-chip",[1175,5179,5180],{},"SoC 生成框架和相关组件",[1157,5182,5183,5186],{},[1175,5184,5185],{},"riscv-tools",[1175,5187,5188],{},"工具链和测试支持",[978,5190,5191],{},"Quick Start 的核心流程是：",[1332,5193,5196],{"className":5194,"code":5195,"language":1337},[1335],"下载 rocket-chip\n启用 BOOM\n初始化子模块\n编译并运行 riscv-tests\n",[1339,5197,5195],{"__ignoreMap":1341},[978,5199,5200],{},"这部分主要告诉我们：",[978,5202,5203],{},"BOOM 是一个可以实际下载、配置、运行和测试的开源项目。",[1307,5205],{},[1013,5207,5209],{"id":5208},"_710-验证与调试","7.10 验证与调试",[978,5211,5212],{},"BOOM 参数化程度高，因此验证比较困难。",[978,5214,5215],{},"常用测试包括：",[1278,5217,5218,5221,5224,5227,5230],{},[1281,5219,5220],{},"riscv-tests；",[1281,5222,5223],{},"CoreMark；",[1281,5225,5226],{},"SPEC；",[1281,5228,5229],{},"Linux；",[1281,5231,5232],{},"riscv-torture。",[978,5234,5235],{},"其中 riscv-torture 会随机生成测试程序，对处理器进行压力测试。",[978,5237,5238],{},"基本方法是：",[1332,5240,5243],{"className":5241,"code":5242,"language":1337},[1335],"同一程序分别在 Spike 和 BOOM 上运行\n比较最终体系结构状态\n如果不同，说明可能有 bug\n",[1339,5244,5242],{"__ignoreMap":1341},[978,5246,5247],{},"此外，BOOM 还支持 commit logging，用于比较每条提交指令的行为。",[978,5249,5250],{},[1032,5251],{"alt":1032,"src":5252},"\u002Fimg\u002FComputerOrganization\u002FL13-14-ComplexPipeline-127.png",[978,5254,5255],{},[1032,5256],{"alt":1032,"src":5257},"\u002Fimg\u002FComputerOrganization\u002FL13-14-ComplexPipeline-128.png",[978,5259,5260],{},[1032,5261],{"alt":1032,"src":5262},"\u002Fimg\u002FComputerOrganization\u002FL13-14-ComplexPipeline-129.png",[978,5264,5265],{},[1032,5266],{"alt":1032,"src":5267},"\u002Fimg\u002FComputerOrganization\u002FL13-14-ComplexPipeline-130.png",[978,5269,5270],{},[1032,5271],{"alt":1032,"src":5272},"\u002Fimg\u002FComputerOrganization\u002FL13-14-ComplexPipeline-131.png",[1307,5274],{},[1013,5276,5278],{"id":5277},"_711-boom-小结","7.11 BOOM 小结",[978,5280,5281],{},[1032,5282],{"alt":1032,"src":5283},"\u002Fimg\u002FComputerOrganization\u002FL13-14-ComplexPipeline-132.png",[978,5285,5286],{},"BOOM 的意义在于：",[978,5288,5289],{},"它把本章前面讲的复杂 OoO 结构落到了真实处理器中。",[978,5291,5292],{},"可以把 BOOM 理解为：",[1332,5294,5297],{"className":5295,"code":5296,"language":1337},[1335],"RISC-V ISA\n+ 超标量取指与发射\n+ 寄存器重命名\n+ Issue Window\n+ ROB\n+ 统一物理寄存器文件\n+ Load\u002FStore Queue\n+ 顺序提交\n= BOOM OoO Processor\n",[1339,5298,5296],{"__ignoreMap":1341},[1307,5300],{},[1003,5302,5303],{"id":5303},"第七部分总结",[978,5305,5306],{},"第七部分不是继续引入新的抽象理论，而是用 BOOM 做一个工程化例子。",[978,5308,5309],{},"它说明：",[1332,5311,5314],{"className":5312,"code":5313,"language":1337},[1335],"前面讲的 OoO 机制不是孤立概念，\n而是可以组合成一个真实的开源超标量乱序处理器。\n",[1339,5315,5313],{"__ignoreMap":1341},{"title":1341,"searchDepth":5317,"depth":5317,"links":5318},4,[5319,5334,5345,5358,5359,5376,5377,5387,5388,5407,5408,5421],{"id":1005,"depth":5320,"text":1006,"children":5321},2,[5322,5324,5325,5326,5327,5328,5329,5330,5331,5332,5333],{"id":1015,"depth":5323,"text":1016},3,{"id":1037,"depth":5323,"text":1038},{"id":1061,"depth":5323,"text":1062},{"id":1079,"depth":5323,"text":1080},{"id":1094,"depth":5323,"text":1095},{"id":1112,"depth":5323,"text":1113},{"id":1130,"depth":5323,"text":1131},{"id":1148,"depth":5323,"text":1149},{"id":1228,"depth":5323,"text":1229},{"id":1251,"depth":5323,"text":1252},{"id":1269,"depth":5323,"text":1270},{"id":1311,"depth":5320,"text":1312,"children":5335},[5336,5337,5338,5339,5340,5341,5342,5343,5344],{"id":1320,"depth":5323,"text":1321},{"id":1355,"depth":5323,"text":1356},{"id":1416,"depth":5323,"text":1417},{"id":1505,"depth":5323,"text":1506},{"id":1556,"depth":5323,"text":1557},{"id":1634,"depth":5323,"text":1635},{"id":1669,"depth":5323,"text":1670},{"id":1714,"depth":5323,"text":1715},{"id":1769,"depth":5323,"text":1770},{"id":1818,"depth":5320,"text":1819,"children":5346},[5347,5348,5349,5350,5351,5352,5353,5354,5355,5356,5357],{"id":1827,"depth":5323,"text":1828},{"id":1856,"depth":5323,"text":1857},{"id":1897,"depth":5323,"text":1898},{"id":1955,"depth":5323,"text":1956},{"id":2029,"depth":5323,"text":2030},{"id":2085,"depth":5323,"text":2086},{"id":2113,"depth":5323,"text":2114},{"id":2186,"depth":5323,"text":2187},{"id":2228,"depth":5323,"text":2229},{"id":2283,"depth":5323,"text":2284},{"id":2326,"depth":5323,"text":2327},{"id":2377,"depth":5320,"text":2377},{"id":2428,"depth":5320,"text":2429,"children":5360},[5361,5362,5363,5364,5365,5366,5367,5368,5369,5370,5371,5372,5373,5374,5375],{"id":2437,"depth":5323,"text":2438},{"id":2466,"depth":5323,"text":2467},{"id":2495,"depth":5323,"text":2496},{"id":2556,"depth":5323,"text":2557},{"id":2599,"depth":5323,"text":2600},{"id":2628,"depth":5323,"text":2629},{"id":2668,"depth":5323,"text":2669},{"id":2717,"depth":5323,"text":2718},{"id":2751,"depth":5323,"text":2752},{"id":2791,"depth":5323,"text":2792},{"id":2839,"depth":5323,"text":2840},{"id":2871,"depth":5323,"text":2872},{"id":2923,"depth":5323,"text":2924},{"id":2988,"depth":5323,"text":2989},{"id":3040,"depth":5323,"text":3041},{"id":3097,"depth":5320,"text":3097},{"id":3145,"depth":5320,"text":3146,"children":5378},[5379,5380,5381,5382,5383,5384,5385,5386],{"id":3154,"depth":5323,"text":3155},{"id":3212,"depth":5323,"text":3213},{"id":3268,"depth":5323,"text":3269},{"id":3325,"depth":5323,"text":3326},{"id":3488,"depth":5323,"text":3489},{"id":3555,"depth":5323,"text":3556},{"id":3611,"depth":5323,"text":3612},{"id":3660,"depth":5323,"text":3661},{"id":3716,"depth":5320,"text":3716},{"id":3768,"depth":5320,"text":3769,"children":5389},[5390,5391,5392,5393,5394,5395,5396,5397,5398,5399,5400,5401,5402,5403,5404,5405,5406],{"id":3777,"depth":5323,"text":3778},{"id":3849,"depth":5323,"text":3850},{"id":3885,"depth":5323,"text":3886},{"id":3925,"depth":5323,"text":3926},{"id":3996,"depth":5323,"text":3997},{"id":4029,"depth":5323,"text":4030},{"id":4065,"depth":5323,"text":4066},{"id":4097,"depth":5323,"text":4098},{"id":4131,"depth":5323,"text":4132},{"id":4179,"depth":5323,"text":4180},{"id":4225,"depth":5323,"text":4226},{"id":4285,"depth":5323,"text":4286},{"id":4320,"depth":5323,"text":4321},{"id":4370,"depth":5323,"text":4371},{"id":4399,"depth":5323,"text":4400},{"id":4487,"depth":5323,"text":4488},{"id":4592,"depth":5323,"text":4593},{"id":4642,"depth":5320,"text":4642},{"id":4662,"depth":5320,"text":4663,"children":5409},[5410,5411,5412,5413,5414,5415,5416,5417,5418,5419,5420],{"id":4671,"depth":5323,"text":4672},{"id":4734,"depth":5323,"text":4735},{"id":4779,"depth":5323,"text":4780},{"id":4825,"depth":5323,"text":4826},{"id":4890,"depth":5323,"text":4891},{"id":4949,"depth":5323,"text":4950},{"id":5028,"depth":5323,"text":5029},{"id":5078,"depth":5323,"text":5079},{"id":5142,"depth":5323,"text":5143},{"id":5208,"depth":5323,"text":5209},{"id":5277,"depth":5323,"text":5278},{"id":5303,"depth":5320,"text":5303},[903],"在 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