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forever",[282,446,447,450,452,455,457,795,798],{},[285,448,449],{},"function",[285,451,290],{},[285,453,454],{},"task",[285,456,290],{},[285,458,459,794],{},[460,461,464,586],"span",{"className":462},[463],"katex",[460,465,468],{"className":466},[467],"katex-mathml",[469,470,472],"math",{"xmlns":471},"http:\u002F\u002Fwww.w3.org\u002F1998\u002FMath\u002FMathML",[473,474,475,581],"semantics",{},[476,477,478,482,485,488,491,494,497,500,504,508,510,513,516,519,522,525,528,530,532,534,536,538,540,542,544,547,549,551,553,555,557,559,561,563,565,567,569,571,573,575,577,579],"mrow",{},[479,480,481],"mi",{},"d",[479,483,484],{},"i",[479,486,487],{},"s",[479,489,490],{},"p",[479,492,493],{},"l",[479,495,496],{},"a",[479,498,499],{},"y",[501,502,503],"mo",{},"\u003C",[479,505,507],{"mathvariant":506},"normal","\u002F",[479,509,487],{},[479,511,512],{},"t",[479,514,515],{},"r",[479,517,518],{},"o",[479,520,521],{},"n",[479,523,524],{},"g",[501,526,527],{},">",[501,529,503],{},[479,531,487],{},[479,533,512],{},[479,535,515],{},[479,537,518],{},[479,539,521],{},[479,541,524],{},[501,543,527],{},[545,546,290],"mtext",{},[501,548,503],{},[479,550,507],{"mathvariant":506},[479,552,487],{},[479,554,512],{},[479,556,515],{},[479,558,518],{},[479,560,521],{},[479,562,524],{},[501,564,527],{},[501,566,503],{},[479,568,487],{},[479,570,512],{},[479,572,515],{},[479,574,518],{},[479,576,521],{},[479,578,524],{},[501,580,527],{},[582,583,585],"annotation",{"encoding":584},"application\u002Fx-tex","display\u003C\u002Fstrong>\u003Cstrong>、\u003C\u002Fstrong>\u003Cstrong>",[460,587,591,635,674,708,728,764],{"className":588,"ariaHidden":590},[589],"katex-html","true",[460,592,595,600,605,608,611,616,619,623,628,632],{"className":593},[594],"base",[460,596],{"className":597,"style":599},[598],"strut","height:0.8889em;vertical-align:-0.1944em;",[460,601,481],{"className":602},[603,604],"mord","mathnormal",[460,606,484],{"className":607},[603,604],[460,609,487],{"className":610},[603,604],[460,612,615],{"className":613,"style":614},[603,604],"margin-right:0.0197em;","pl",[460,617,496],{"className":618},[603,604],[460,620,499],{"className":621,"style":622},[603,604],"margin-right:0.0359em;",[460,624],{"className":625,"style":627},[626],"mspace","margin-right:0.2778em;",[460,629,503],{"className":630},[631],"mrel",[460,633],{"className":634,"style":627},[626],[460,636,638,642,645,648,651,655,658,661,664,667,671],{"className":637},[594],[460,639],{"className":640,"style":641},[598],"height:1em;vertical-align:-0.25em;",[460,643,507],{"className":644},[603],[460,646,487],{"className":647},[603,604],[460,649,512],{"className":650},[603,604],[460,652,515],{"className":653,"style":654},[603,604],"margin-right:0.0278em;",[460,656,518],{"className":657},[603,604],[460,659,521],{"className":660},[603,604],[460,662,524],{"className":663,"style":622},[603,604],[460,665],{"className":666,"style":627},[626],[460,668,670],{"className":669},[631],">\u003C",[460,672],{"className":673,"style":627},[626],[460,675,677,681,684,687,690,693,696,699,702,705],{"className":676},[594],[460,678],{"className":679,"style":680},[598],"height:0.8095em;vertical-align:-0.1944em;",[460,682,487],{"className":683},[603,604],[460,685,512],{"className":686},[603,604],[460,688,515],{"className":689,"style":654},[603,604],[460,691,518],{"className":692},[603,604],[460,694,521],{"className":695},[603,604],[460,697,524],{"className":698,"style":622},[603,604],[460,700],{"className":701,"style":627},[626],[460,703,527],{"className":704},[631],[460,706],{"className":707,"style":627},[626],[460,709,711,715,719,722,725],{"className":710},[594],[460,712],{"className":713,"style":714},[598],"height:0.7224em;vertical-align:-0.0391em;",[460,716,290],{"className":717},[603,718],"cjk_fallback",[460,720],{"className":721,"style":627},[626],[460,723,503],{"className":724},[631],[460,726],{"className":727,"style":627},[626],[460,729,731,734,737,740,743,746,749,752,755,758,761],{"className":730},[594],[460,732],{"className":733,"style":641},[598],[460,735,507],{"className":736},[603],[460,738,487],{"className":739},[603,604],[460,741,512],{"className":742},[603,604],[460,744,515],{"className":745,"style":654},[603,604],[460,747,518],{"className":748},[603,604],[460,750,521],{"className":751},[603,604],[460,753,524],{"className":754,"style":622},[603,604],[460,756],{"className":757,"style":627},[626],[460,759,670],{"className":760},[631],[460,762],{"className":763,"style":627},[626],[460,765,767,770,773,776,779,782,785,788,791],{"className":766},[594],[460,768],{"className":769,"style":680},[598],[460,771,487],{"className":772},[603,604],[460,774,512],{"className":775},[603,604],[460,777,515],{"className":778,"style":654},[603,604],[460,780,518],{"className":781},[603,604],[460,783,521],{"className":784},[603,604],[460,786,524],{"className":787,"style":622},[603,604],[460,789],{"className":790,"style":627},[626],[460,792,527],{"className":793},[631],"finish",[285,796,797],{},"、文件相关系统任务等的作用",[279,799,800,814],{},[282,801,802,804,805,809,810,813],{},[285,803,321],{}," VLecture8_Functions_&",[806,807,808],"em",{},"Task","&",[806,811,812],{},"System_Call","-_2025.pdf",[282,815,816,818],{},[285,817,327],{},[279,819,820,823,826,888],{},[282,821,822],{},"function vs. task 对比",[282,824,825],{},"$display (及其%格式)",[282,827,828,887],{},[460,829,831,860],{"className":830},[463],[460,832,834],{"className":833},[467],[469,835,836],{"xmlns":471},[473,837,838,857],{},[476,839,840,843,845,847,849,851,854],{},[479,841,842],{},"f",[479,844,484],{},[479,846,521],{},[479,848,484],{},[479,850,487],{},[479,852,853],{},"h",[501,855,856],{"separator":590},",",[582,858,859],{"encoding":584},"finish, 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",[460,920,922],{"className":921,"ariaHidden":590},[589],[460,923,925,928,931,934,937,940,943],{"className":924},[594],[460,926],{"className":927,"style":599},[598],[460,929,842],{"className":930,"style":872},[603,604],[460,932,518],{"className":933},[603,604],[460,935,490],{"className":936},[603,604],[460,938,911],{"className":939},[603,604],[460,941,521],{"className":942},[603,604],[460,944,856],{"className":945},[886],"fclose, ",[460,948,950,980],{"className":949},[463],[460,951,953],{"className":952},[467],[469,954,955],{"xmlns":471},[473,956,957,977],{},[476,958,959,961,963,965,967,969,971,973,975],{},[479,960,842],{},[479,962,481],{},[479,964,484],{},[479,966,487],{},[479,968,490],{},[479,970,493],{},[479,972,496],{},[479,974,499],{},[501,976,856],{"separator":590},[582,978,979],{"encoding":584},"fdisplay, ",[460,981,983],{"className":982,"ariaHidden":590},[589],[460,984,986,989,992,995,998,1001,1004,1007,1010],{"className":985},[594],[460,987],{"className":988,"style":599},[598],[460,990,842],{"className":991,"style":872},[603,604],[460,993,481],{"className":994},[603,604],[460,996,484],{"className":997},[603,604],[460,999,487],{"className":1000},[603,604],[460,1002,615],{"className":1003,"style":614},[603,604],[460,1005,496],{"className":1006},[603,604],[460,1008,499],{"className":1009,"style":622},[603,604],[460,1011,856],{"className":1012},[886],"readmemb)",[282,1015,1016,1019,1021,1024,1026,1029],{},[285,1017,1018],{},"状态机FSM的3个",[285,1020,354],{},[285,1022,1023],{},"块写法、数据通路的2个",[285,1025,354],{},[285,1027,1028],{},"块写法",[279,1030,1031,1036],{},[282,1032,1033,1035],{},[285,1034,321],{}," VLecture12_Controller_and_Data-Path_Coding_-_2025.pdf",[282,1037,1038,1040],{},[285,1039,327],{},[279,1041,1042,1054,1065],{},[282,1043,1044,1047,1049,1050,1053],{},[285,1045,1046],{},"3-",[285,1048,354],{}," ",[285,1051,1052],{},"FSM"," (时序+次态+输出)",[282,1055,1056,1059,1049,1061,1064],{},[285,1057,1058],{},"2-",[285,1060,354],{},[285,1062,1063],{},"Datapath"," (在GCD示例中)",[282,1066,1067],{},"对比1、2、3个 always 块的优缺点",[282,1069,1070,1073],{},[285,1071,1072],{},"阻塞的组合逻辑、非阻塞的时序逻辑写法, 避免锁存器",[279,1074,1075,1080],{},[282,1076,1077,1079],{},[285,1078,321],{}," VLecture6 和 VLecture9",[282,1081,1082,1084],{},[285,1083,327],{},[279,1085,1086,1104,1114,1123],{},[282,1087,1088,1091,1094,1097,1100,1103],{},[285,1089,1090],{},"阻塞 (",[285,1092,1093],{},"=",[285,1095,1096],{},") vs. 非阻塞 (",[285,1098,1099],{},"\u003C=",[285,1101,1102],{},")"," 的核心区别和执行顺序 (VLecture6)",[282,1105,1106,1109,1110,1113],{},[285,1107,1108],{},"规则1："," 时序逻辑 (带 posedge clk) ",[285,1111,1112],{},"必须","使用非阻塞 (\u003C=) (VLecture6)",[282,1115,1116,1119,1120,1122],{},[285,1117,1118],{},"规则2："," 组合逻辑 (always @(*)) ",[285,1121,1112],{},"使用阻塞 (=) (VLecture3, Key_of_The_Course)",[282,1124,1125,1128],{},[285,1126,1127],{},"避免锁存器 (Latch)："," 组合逻辑 always 块中的 if 必须有 else，case 必须有 default (VLecture9)",[282,1130,1131,1134],{},[285,1132,1133],{},"代码编写规范与命名法、RTL设计(风格)",[279,1135,1136,1141],{},[282,1137,1138,1140],{},[285,1139,321],{}," VLecture11__Register-Transfer_Design_-_2025.pdf",[282,1142,1143,1145],{},[285,1144,327],{},[279,1146,1147,1150,1153],{},[282,1148,1149],{},"RTL设计 (寄存器传输级) 概念",[282,1151,1152],{},"RTL风格 (匈牙利命名法, 结构化注释等)",[282,1154,1155],{},"VLecture9 也通篇在讲“可综合的RTL风格”",[282,1157,1158,1161],{},[285,1159,1160],{},"单时钟域与跨时钟域、门控时钟、异步复位",[279,1162,1163,1167],{},[282,1164,1165,1140],{},[285,1166,321],{},[282,1168,1169,1171],{},[285,1170,327],{},[279,1172,1173,1176,1179,1182],{},[282,1174,1175],{},"单时钟域 vs. 多时钟域",[282,1177,1178],{},"跨时钟域同步 (同步器)",[282,1180,1181],{},"门控时钟 (Clock Gating) 及其风险",[282,1183,1184],{},"异步复位 (及其同步化\u002F同步释放)",[282,1186,1187,1190],{},[285,1188,1189],{},"Verilog的数据流模型、行为模型、结构(级)模型与...的关系?",[279,1191,1192,1197],{},[282,1193,1194,1196],{},[285,1195,321],{}," VLecture1, VLecture3, VLecture5",[282,1198,1199,1201],{},[285,1200,327],{},[279,1202,1203,1209,1215],{},[282,1204,1205,1208],{},[285,1206,1207],{},"Verilog模型分类："," 结构 (门实例化)，数据流 (assign)，行为 (always\u002Finitial) (VLecture1)",[282,1210,1211,1214],{},[285,1212,1213],{},"数字系统模型："," 行为 (功能)，结构 (输入输出与层次) (VLecture1)",[282,1216,1217,1220],{},[285,1218,1219],{},"关系："," Verilog的数据流和行为模型都用于描述数字系统的行为。Verilog的结构(级)模型用于描述数字系统的结构。",[282,1222,1223,1226],{},[285,1224,1225],{},"Verilog的结构(级)模型具体指哪种描述方式?",[279,1227,1228,1233],{},[282,1229,1230,1232],{},[285,1231,321],{}," VLecture5_Dataflow_Modeling_-_2025.pdf",[282,1234,1235,1237],{},[285,1236,327],{},[279,1238,1239],{},[282,1240,1241,1242,1245,1246,1249],{},"指使用",[285,1243,1244],{},"门级原语"," (如 and, or, not) 或",[285,1247,1248],{},"模块实例化"," (orunit G1(...)) 来描述电路连接的方式。",[1251,1252],"hr",{},[270,1254,1255],{"id":1255},"设计基础",[279,1257,1258,1288,1314,1337,1360,1405,1429],{},[282,1259,1260,1263],{},[285,1261,1262],{},"VLSI\u002FFPGA设计流程? ... 前端设计方法学是怎样的?",[279,1264,1265,1273],{},[282,1266,1267,1269,1270,813],{},[285,1268,321],{}," VLecture1_Introduction_-",[806,1271,1272],{},"2025.pdf 和 VLecture9_Logic_Synthesis",[282,1274,1275,1277],{},[285,1276,327],{},[279,1278,1279,1282,1285],{},[282,1280,1281],{},"VLSI设计流程 (RTL -> 综合 -> 布局布线 -> ...) (VLecture1)",[282,1283,1284],{},"前端设计方法学 (行为描述 -> 架构 -> RTL -> 验证) (VLecture1)",[282,1286,1287],{},"FPGA vs VLSI 流程对比 (前端\u002F后端) (VLecture9)",[282,1289,1290,1293],{},[285,1291,1292],{},"关键路径、虚假路径、冗余路径的概念? ...",[279,1294,1295,1299],{},[282,1296,1297,1140],{},[285,1298,321],{},[282,1300,1301,1303],{},[285,1302,327],{},[279,1304,1305,1308,1311],{},[282,1306,1307],{},"关键路径 (Critical Path)",[282,1309,1310],{},"虚假路径 (False Path)",[282,1312,1313],{},"冗余逻辑 (Redundant Logic)",[282,1315,1316,1319],{},[285,1317,1318],{},"不可到达状态、沉没状态的概念?",[279,1320,1321,1325],{},[282,1322,1323,1035],{},[285,1324,321],{},[282,1326,1327,1329],{},[285,1328,327],{},[279,1330,1331,1334],{},[282,1332,1333],{},"不可到达状态 (Unreachable States)",[282,1335,1336],{},"沉没状态 (Sink States)",[282,1338,1339,1342],{},[285,1340,1341],{},"设计评价: 面积\u002F时钟(性能)\u002F功耗",[279,1343,1344,1348],{},[282,1345,1346,1140],{},[285,1347,321],{},[282,1349,1350,1352],{},[285,1351,327],{},[279,1353,1354,1357],{},[282,1355,1356],{},"RTL前评估\u002F架构评估的简单估算方法",[282,1358,1359],{},"VLecture9 也有综合后的评估图",[282,1361,1362,1365],{},[285,1363,1364],{},"ASM图方法、系统框图概念...如何编写控制器\u002F状态机、数据通路的Verilog代码?",[279,1366,1367,1372],{},[282,1368,1369,1371],{},[285,1370,321],{}," VLecture11 和 VLecture12",[282,1373,1374,1376],{},[285,1375,327],{},[279,1377,1378,1381,1384],{},[282,1379,1380],{},"ASM (算法状态机) 概念 (VLecture11)",[282,1382,1383],{},"从初始流图 -> 系统框图 (划分) -> 控制器ASM图 -> FSM状态转换图 的完整示例 (VLecture11)",[282,1385,1386,1389,1390,1392,1049,1394,1397,1398,1400,1049,1402,1404],{},[285,1387,1388],{},"编码："," 控制器用 ",[285,1391,1046],{},[285,1393,354],{},[285,1395,1396],{},"块","，数据通路用 ",[285,1399,1058],{},[285,1401,354],{},[285,1403,1396],{}," (VLecture12)",[282,1406,1407,1410],{},[285,1408,1409],{},"什么是综合? 可综合的关键...",[279,1411,1412,1417],{},[282,1413,1414,1416],{},[285,1415,321],{}," VLecture9_Logic_Synthesis_-_2025.pdf",[282,1418,1419,1421],{},[285,1420,327],{},[279,1422,1423,1426],{},[282,1424,1425],{},"综合的定义 (RTL代码 -> 门级网表)",[282,1427,1428],{},"三个关键点 (RTL描述、可转换、行为一致)",[282,1430,1431,1434],{},[285,1432,1433],{},"Testbench的主要框架...",[279,1435,1436,1440],{},[282,1437,1438,1140],{},[285,1439,321],{},[282,1441,1442,1444],{},[285,1443,327],{},[279,1445,1446,1449,1452,1455,1458],{},[282,1447,1448],{},"Testbench 框架 (UUT + Tester)",[282,1450,1451],{},"测试激励 (Stimulus) (用 initial 和 # 延迟)",[282,1453,1454],{},"结果检查 (Checking)",[282,1456,1457],{},"覆盖率 (Coverage) 和回归 (Regression)",[282,1459,1460],{},"VLecture1 也有Testbench在设计流程中的位置",[1251,1462],{},[270,1464,1466],{"id":1465},"设计基础-续","设计基础, 续",[279,1468,1469,1505,1534,1575,1608],{},[282,1470,1471,1474],{},[285,1472,1473],{},"全加器、半加器、进位保留加法器...",[279,1475,1476,1481],{},[282,1477,1478,1480],{},[285,1479,321],{}," VLecture10_Hardware_Computing_-_2025.pdf",[282,1482,1483,1485],{},[285,1484,327],{},[279,1486,1487,1490,1493,1496,1499,1502],{},[282,1488,1489],{},"半加器 (Half Adder)",[282,1491,1492],{},"全加器 (Full Adder)",[282,1494,1495],{},"进位保留加法器 (Carry-Save Adder, CSA)",[282,1497,1498],{},"先行进位加法器 (Carry-Lookahead)",[282,1500,1501],{},"进位跳跃加法器 (Carry-Skip)",[282,1503,1504],{},"进位选择加法器 (Carry-Select)",[282,1506,1507,1510],{},[285,1508,1509],{},"阵列乘法器、Booth乘法器、Wallace乘法器...除法的基础方法",[279,1511,1512,1516],{},[282,1513,1514,1480],{},[285,1515,321],{},[282,1517,1518,1520],{},[285,1519,327],{},[279,1521,1522,1525,1528,1531],{},[282,1523,1524],{},"阵列乘法器 (Array Multiplier)",[282,1526,1527],{},"Booth乘法器 (Booth Multiplier)",[282,1529,1530],{},"Wallace乘法器 (Wallace Tree)",[282,1532,1533],{},"除法 (Division) 算法流图",[282,1535,1536,1543],{},[285,1537,1538,1539,1542],{},"浮点编码格式",[460,1540,1541],{},"包括非规范值","、浮点处理异常、向偶舍入",[279,1544,1545,1550],{},[282,1546,1547,1549],{},[285,1548,321],{}," VLecture13_Float_Point_Standard_-_2025.pdf",[282,1551,1552,1554],{},[285,1553,327],{},[279,1555,1556,1563,1566,1572],{},[282,1557,1558,1559,1562],{},"编码格式 (规范值, ",[285,1560,1561],{},"非规范值",", 特殊值)",[282,1564,1565],{},"异常 (Exceptions) (非法操作, 上溢, 下溢, 被0除, 不精确)",[282,1567,1568,1569,1102],{},"舍入模式 (Rounding) (特别是",[285,1570,1571],{},"向偶舍入",[282,1573,1574],{},"VLecture14 也有向偶舍入的 GRS 位实现",[282,1576,1577,1580],{},[285,1578,1579],{},"单周期、多周期、流水线处理器的概念架构, 流水线与冲突的关系, 协处理器及其与主处理器关系",[279,1581,1582,1587],{},[282,1583,1584,1586],{},[285,1585,321],{}," VLecture15_Design_Explore_-_2025.pdf",[282,1588,1589,1591],{},[285,1590,327],{},[279,1592,1593,1596,1599,1602,1605],{},[282,1594,1595],{},"架构对比 (单周期\u002F多周期\u002F流水线)",[282,1597,1598],{},"流水线冲突 (Hazard) (结构\u002F数据\u002F控制)",[282,1600,1601],{},"冲突解决 (前推\u002F暂停)",[282,1603,1604],{},"协处理器 (Coprocessor) 概念 (CP0\u002FCP1)",[282,1606,1607],{},"主-协处理器关系 (指令分发, mfc1\u002Fmtc1)",[282,1609,1610,1613],{},[285,1611,1612],{},"请说明实践指南章节中示例的主处理器与协处理器是怎样解决数据冲突的",[279,1614,1615,1619],{},[282,1616,1617,1586],{},[285,1618,321],{},[282,1620,1621,1623],{},[285,1622,327],{},[279,1624,1625,1632,1635,1638],{},[282,1626,1627,1628,1631],{},"这是对讲义内容的",[285,1629,1630],{},"理解题","。答案在第 49-54, 59, 61 页。",[282,1633,1634],{},"主处理器 (MF) 冲突 (GPR)",[282,1636,1637],{},"FPU 冲突 (FPR) (包括来自 MF 的 mtc1 和 FPU 内部的运算)",[282,1639,1640],{},"解决方案：阻塞控制 (Stalling) 和数据前推 (Forwarding)。",[1251,1642],{},[270,1644,1645],{"id":1645},"练习示例",[490,1647,1648,1649,1652],{},"（这部分是",[285,1650,1651],{},"复习指南中的问题","，我来指出每个问题对应的知识点在哪个PPT中）",[279,1654,1655,1667,1679,1691,1703,1715,1727,1738,1749,1760,1771,1782,1793,1809],{},[282,1656,1657,1660],{},[285,1658,1659],{},"...评价时钟、面积、功耗?",[279,1661,1662],{},[282,1663,1664,1140],{},[285,1665,1666],{},"答案来源：",[282,1668,1669,1672],{},[285,1670,1671],{},"...复位同步化的Verilog代码...",[279,1673,1674],{},[282,1675,1676,1678],{},[285,1677,1666],{}," VLecture11__Register-Transfer_Design_-_2025.pdf (概念)。",[282,1680,1681,1684],{},[285,1682,1683],{},"...8位中找最高位\"1\"的Verilog代码...",[279,1685,1686],{},[282,1687,1688,1690],{},[285,1689,1666],{}," VLecture10_Hardware_Computing_-_2025.pdf (第64页提供了完整代码)。",[282,1692,1693,1696],{},[285,1694,1695],{},"...异步复位D触发器。",[279,1697,1698],{},[282,1699,1700,1702],{},[285,1701,1666],{}," VLecture9_Logic_Synthesis_-_2025.pdf (第36页提供了完整代码) 和 VLecture10 (第61页)。",[282,1704,1705,1708],{},[285,1706,1707],{},"...中间变量方式...全加器单元...",[279,1709,1710],{},[282,1711,1712,1714],{},[285,1713,1666],{}," VLecture10_Hardware_Computing_-_2025.pdf (第63页提供了完整代码)。",[282,1716,1717,1720],{},[285,1718,1719],{},"...中间变量方式...32位组合向左移位器...",[279,1721,1722],{},[282,1723,1724,1726],{},[285,1725,1666],{}," VLecture10_Hardware_Computing_-_2025.pdf (第68页提供了完整代码)。",[282,1728,1729,1732],{},[285,1730,1731],{},"...Testbench的大致框架?",[279,1733,1734],{},[282,1735,1736,1140],{},[285,1737,1666],{},[282,1739,1740,1743],{},[285,1741,1742],{},"...单精度规范值与非规范值、特殊值有什么不同?",[279,1744,1745],{},[282,1746,1747,1549],{},[285,1748,1666],{},[282,1750,1751,1754],{},[285,1752,1753],{},"...多周期架构与流水线架构的相同与不同?",[279,1755,1756],{},[282,1757,1758,1586],{},[285,1759,1666],{},[282,1761,1762,1765],{},[285,1763,1764],{},"...主处理器与协处理器是怎样大致衔接的?...",[279,1766,1767],{},[282,1768,1769,1586],{},[285,1770,1666],{},[282,1772,1773,1776],{},[285,1774,1775],{},"...普通加法器与进位保留加法器的异同?...",[279,1777,1778],{},[282,1779,1780,1480],{},[285,1781,1666],{},[282,1783,1784,1787],{},[285,1785,1786],{},"...Wallace乘法器的概念?",[279,1788,1789],{},[282,1790,1791,1480],{},[285,1792,1666],{},[282,1794,1795,1798],{},[285,1796,1797],{},"...叙述ASM图方法...",[279,1799,1800],{},[282,1801,1802,1804,1805,1808],{},[285,1803,1666],{}," VLecture11__Register-Transfer_Design_-",[806,1806,1807],{},"2025.pdf (方法) 和 VLecture12_Controller_and_Data-Path_Coding","-_2025.pdf (编码风格)。",[282,1810,1811,1814],{},[285,1812,1813],{},"...以下代码可以综合吗?并根据以下代码解释什么是综合?",[279,1815,1816,1825],{},[282,1817,1818,1820,1821,1824],{},[285,1819,1666],{}," VLecture9_Logic_Synthesis_-",[806,1822,1823],{},"2025.pdf (综合概念, 锁存器陷阱) 和 VLecture6_Behavioral_Modeling：Non-blocking__Assignment","-_2025.pdf (非阻塞赋值用于时序逻辑)。",[282,1826,1827,1830,1831,1834,1835,1838,1839,1842,1844,1846],{},[285,1828,1829],{},"解释："," 这段代码",[285,1832,1833],{},"不可综合","（或者说会综合出",[285,1836,1837],{},"锁存器","），因为你在组合逻辑块 (always @(a or b...)) 中错误地使用了",[285,1840,1841],{},"非阻塞赋值 (",[285,1843,1099],{},[285,1845,1102],{},"。",{"title":1848,"searchDepth":1849,"depth":1849,"links":1850},"",4,[1851,1852,1853,1854,1855],{"id":272,"depth":1849,"text":273},{"id":276,"depth":1849,"text":277},{"id":1255,"depth":1849,"text":1255},{"id":1465,"depth":1849,"text":1466},{"id":1645,"depth":1849,"text":1645},[228],"课程笔记与 PPT 章节的对应关系","md",null,{"slots":1861},{},{"text":1863,"minutes":1864,"time":1865,"words":1866},"10 min read",9.26,555600,1852,{"title":211,"description":1857},{"loc":210},[1870,1871,1872],"复习提纲","HDL","课程笔记","tech","8sMclduTtWHrLd1c3AP0m74iJfpwHbyA4sKh5duXyjA",[1876,1877],{"title":196,"path":195,"stem":194,"date":197,"type":1873,"children":-1},{"title":224,"path":223,"stem":222,"date":44,"type":1873,"children":-1},1789037802240]